Hussein Alameer

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Portland, OR, US

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Patents Grantslast 30 patents

Information Patent Grant
Memory device with local cache array
- Patent number 11,144,466
- Issue date Oct 12, 2021
- Intel Corporation
- Jongwon Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pseudo-channeled DRAM
- Patent number 10,770,129
- Issue date Sep 8, 2020
- Intel Corporation
- Hussein Alameer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Stacked memory chip device with enhanced data protection capability
- Patent number 10,459,809
- Issue date Oct 29, 2019
- Intel Corporation
- Hussein Alameer
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
MULTIPLEXED RANKS (MR) WITH PSEUDO BURST LENGTH 32 (BL32)
- Publication number 20230071117
- Publication date Mar 9, 2023
- Intel Corporation
- Hussein ALAMEER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REFRESH PERFORMANCE OPTIMIZATIONS FOR DRAM TECHNOLOGIES WITH SUB-CH...
- Publication number 20220254408
- Publication date Aug 11, 2022
- Intel Corporation
- Michelle Wigton
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE WITH LOCAL CACHE ARRAY
- Publication number 20190286566
- Publication date Sep 19, 2019
- Intel Corporation
- Jongwon Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PSEUDO-CHANNELED DRAM
- Publication number 20190043552
- Publication date Feb 7, 2019
- Intel Corporation
- Hussein Alameer
- G11 - INFORMATION STORAGE
Information Patent Application
STACKED MEMORY CHIP DEVICE WITH ENHANCED DATA PROTECTION CAPABILITY
- Publication number 20190004909
- Publication date Jan 3, 2019
- Intel Corporation
- Hussein ALAMEER
- G11 - INFORMATION STORAGE
Information Patent Application
INCREASED REDUNDANCY IN MULTI-DEVICE MEMORY PACKAGE TO IMPROVE RELI...
- Publication number 20180137005
- Publication date May 17, 2018
- Intel Corporation
- Wei Wu
- G06 - COMPUTING CALCULATING COUNTING