Hyeokjin Bruce Lim

Person

San Diego, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Vertical power grid standard cell architecture
- Patent number 11,710,733
- Issue date Jul 25, 2023
- QUALCOMM Incorporated
- Hyeokjin Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Field-effect transistors (FET) circuits employing topside and backs...
- Patent number 11,437,379
- Issue date Sep 6, 2022
- QUALCOMM Incorporated
- Stanley Seungchul Song
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Circuits employing a back side-front side connection structure for...
- Patent number 11,404,374
- Issue date Aug 2, 2022
- QUALCOMM Incorporated
- Hyeokjin Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multibit multi-height cell to improve pin accessibility
- Patent number 11,290,109
- Issue date Mar 29, 2022
- QUALCOMM Incorporated
- Foua Vang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multiple via structure for high performance standard cells
- Patent number 11,133,803
- Issue date Sep 28, 2021
- QUALCOMM Incorporated
- Satyanarayana Sahu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Metal oxide semiconductor device of an integrated circuit
- Patent number 10,965,289
- Issue date Mar 30, 2021
- QUALCOMM Incorporated
- Satyanarayana Sahu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Standard cell architecture for gate tie-off
- Patent number 10,784,345
- Issue date Sep 22, 2020
- QUALCOMM Incorporated
- Xiangdong Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Standard cell architecture for gate tie-off
- Patent number 10,777,640
- Issue date Sep 15, 2020
- QUALCOMM Incorporated
- Xiangdong Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High performance cell design in a technology with high density meta...
- Patent number 10,692,808
- Issue date Jun 23, 2020
- QUALCOMM Incorporated
- Renukprasad Hiremath
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Visible alignment markers/landmarks for CAD-to-silicon backside ima...
- Patent number 10,605,859
- Issue date Mar 31, 2020
- QUALCOMM Incorporated
- Rami Salem
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Standard cell architecture for gate tie-off
- Patent number 10,600,866
- Issue date Mar 24, 2020
- QUALCOMM Incorporated
- Xiangdong Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Placement methodology to remove filler
- Patent number 10,490,543
- Issue date Nov 26, 2019
- QUALCOMM Incorporated
- Xiangdong Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple via structure for high performance standard cells
- Patent number 10,236,886
- Issue date Mar 19, 2019
- QUALCOMM Incorporated
- Satyanarayana Sahu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Hybrid coloring methodology for multi-pattern technology
- Patent number 10,175,571
- Issue date Jan 8, 2019
- QUALCOMM Incorporated
- Xiangdong Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Standard cell architecture for parasitic resistance reduction
- Patent number 9,960,231
- Issue date May 1, 2018
- QUALCOMM Incorporated
- Xiangdong Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Power rail inbound middle of line (MOL) routing
- Patent number 9,935,100
- Issue date Apr 3, 2018
- QUALCOMM Incorporated
- Hyeokjin Bruce Lim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Metal oxide semiconductor cell device architecture with mixed diffu...
- Patent number 9,831,272
- Issue date Nov 28, 2017
- QUALCOMM Incorporated
- Xiangdong Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Source separated cell
- Patent number 9,577,639
- Issue date Feb 21, 2017
- QUALCOMM Incorporated
- Satyanarayana Sahu
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
COLUMN DIVIDED MULTI-HEIGHT ARCHITECTURE
- Publication number 20240266342
- Publication date Aug 8, 2024
- QUALCOMM Incorporated
- Renukprasad HIREMATH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ENGINEERING CHANGE ORDER (ECO) SPARE CELL
- Publication number 20240249056
- Publication date Jul 25, 2024
- QUALCOMM Incorporated
- Hyeokjin LIM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUIT CELL INCLUDING COLUMN STACKED PINS
- Publication number 20240170488
- Publication date May 23, 2024
- QUALCOMM Incorporated
- Renukprasad HIREMATH
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HETEROGENEOUS HEIGHT LOGIC CELL ARCHITECTURE
- Publication number 20220115405
- Publication date Apr 14, 2022
- QUALCOMM Incorporated
- Hyeokjin LIM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CIRCUITS EMPLOYING A BACK SIDE-FRONT SIDE CONNECTION STRUCTURE FOR...
- Publication number 20220102266
- Publication date Mar 31, 2022
- QUALCOMM Incorporated
- Hyeokjin Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FIELD-EFFECT TRANSISTORS (FET) CIRCUITS EMPLOYING TOPSIDE AND BACKS...
- Publication number 20220093594
- Publication date Mar 24, 2022
- QUALCOMM Incorporated
- Stanley Seungchul SONG
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
MULTIBIT MULTI-HEIGHT CELL TO IMPROVE PIN ACCESSIBILITY
- Publication number 20220094363
- Publication date Mar 24, 2022
- QUALCOMM Incorporated
- Foua VANG
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
VERTICAL POWER GRID STANDARD CELL ARCHITECTURE
- Publication number 20210280571
- Publication date Sep 9, 2021
- QUALCOMM Incorporated
- Hyeokjin LIM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HYBRID FIN FLIP FLOP CIRCUIT ARCHITECTURE
- Publication number 20210058076
- Publication date Feb 25, 2021
- QUALCOMM Incorporated
- Andi ZHAO
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
MULTIPLE VIA STRUCTURE FOR HIGH PERFORMANCE STANDARD CELLS
- Publication number 20200266821
- Publication date Aug 20, 2020
- QUALCOMM Incorporated
- Satyanarayana SAHU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NOVEL STANDARD CELL ARCHITECTURE FOR GATE TIE-OFF
- Publication number 20200176562
- Publication date Jun 4, 2020
- QUALCOMM Incorporated
- Xiangdong Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STANDARD CELL ARCHITECTURE FOR GATE TIE-OFF
- Publication number 20200176563
- Publication date Jun 4, 2020
- QUALCOMM Incorporated
- Xiangdong Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF-ALIGNED GATE CUT FOR OPTIMAL POWER AND ROUTING
- Publication number 20200020795
- Publication date Jan 16, 2020
- QUALCOMM Incorporated
- Junjing BAO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STAGGERED SELF ALIGNED GATE CONTACT
- Publication number 20190252408
- Publication date Aug 15, 2019
- QUALCOMM Incorporated
- Hyeokjin LIM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NOVEL STANDARD CELL ARCHITECTURE FOR GATE TIE-OFF
- Publication number 20190237542
- Publication date Aug 1, 2019
- QUALCOMM Incorporated
- Xiangdong Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PLACEMENT METHODOLOGY TO REMOVE FILLER
- Publication number 20190172823
- Publication date Jun 6, 2019
- QUALCOMM Incorporated
- Xiangdong Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLE VIA STRUCTURE FOR HIGH PERFORMANCE STANDARD CELLS
- Publication number 20190173473
- Publication date Jun 6, 2019
- QUALCOMM Incorporated
- Satyanarayana SAHU
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
HIGH PERFORMANCE CELL DESIGN IN A TECHNOLOGY WITH HIGH DENSITY META...
- Publication number 20190088591
- Publication date Mar 21, 2019
- QUALCOMM Incorporated
- Renukprasad Hiremath
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTIPLE VIA STRUCTURE FOR HIGH PERFORMANCE STANDARD CELLS
- Publication number 20180183439
- Publication date Jun 28, 2018
- QUALCOMM Incorporated
- Satyanarayana SAHU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VISIBLE ALIGNMENT MARKERS/LANDMARKS FOR CAD-TO-SILICON BACKSIDE IMA...
- Publication number 20180074117
- Publication date Mar 15, 2018
- QUALCOMM Incorporated
- Rami SALEM
- G01 - MEASURING TESTING
Information Patent Application
STANDARD CELL ARCHITECTURE FOR PARASITIC RESISTANCE REDUCTION
- Publication number 20170365657
- Publication date Dec 21, 2017
- QUALCOMM Incorporated
- Xiangdong CHEN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METAL OXIDE SEMICONDUCTOR CELL DEVICE ARCHITECTURE WITH MIXED DIFFU...
- Publication number 20170287933
- Publication date Oct 5, 2017
- QUALCOMM Incorporated
- Xiangdong CHEN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
POWER RAIL INBOUND MIDDLE OF LINE (MOL) ROUTING
- Publication number 20170133365
- Publication date May 11, 2017
- QUALCOMM Incorporated
- Hyeokjin Bruce Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HYBRID COLORING METHODOLOGY FOR MULTI-PATTERN TECHNOLOGY
- Publication number 20160370699
- Publication date Dec 22, 2016
- QUALCOMM Incorporated
- Xiangdong CHEN
- G06 - COMPUTING CALCULATING COUNTING

Hyeokjin Bruce Lim

Person

Patents Grantslast 30 patents

Vertical power grid standard cell architecture

Field-effect transistors (FET) circuits employing topside and backs...

Circuits employing a back side-front side connection structure for...

Multibit multi-height cell to improve pin accessibility

Multiple via structure for high performance standard cells

Metal oxide semiconductor device of an integrated circuit

Standard cell architecture for gate tie-off

Standard cell architecture for gate tie-off

High performance cell design in a technology with high density meta...

Visible alignment markers/landmarks for CAD-to-silicon backside ima...

Standard cell architecture for gate tie-off

Placement methodology to remove filler

Multiple via structure for high performance standard cells

Hybrid coloring methodology for multi-pattern technology

Standard cell architecture for parasitic resistance reduction

Power rail inbound middle of line (MOL) routing

Metal oxide semiconductor cell device architecture with mixed diffu...

Source separated cell

Patents Applicationslast 30 patents

COLUMN DIVIDED MULTI-HEIGHT ARCHITECTURE

ENGINEERING CHANGE ORDER (ECO) SPARE CELL

INTEGRATED CIRCUIT CELL INCLUDING COLUMN STACKED PINS

HETEROGENEOUS HEIGHT LOGIC CELL ARCHITECTURE

CIRCUITS EMPLOYING A BACK SIDE-FRONT SIDE CONNECTION STRUCTURE FOR...

FIELD-EFFECT TRANSISTORS (FET) CIRCUITS EMPLOYING TOPSIDE AND BACKS...

MULTIBIT MULTI-HEIGHT CELL TO IMPROVE PIN ACCESSIBILITY

VERTICAL POWER GRID STANDARD CELL ARCHITECTURE

HYBRID FIN FLIP FLOP CIRCUIT ARCHITECTURE

MULTIPLE VIA STRUCTURE FOR HIGH PERFORMANCE STANDARD CELLS

NOVEL STANDARD CELL ARCHITECTURE FOR GATE TIE-OFF

STANDARD CELL ARCHITECTURE FOR GATE TIE-OFF

SELF-ALIGNED GATE CUT FOR OPTIMAL POWER AND ROUTING

STAGGERED SELF ALIGNED GATE CONTACT

NOVEL STANDARD CELL ARCHITECTURE FOR GATE TIE-OFF

PLACEMENT METHODOLOGY TO REMOVE FILLER

MULTIPLE VIA STRUCTURE FOR HIGH PERFORMANCE STANDARD CELLS

HIGH PERFORMANCE CELL DESIGN IN A TECHNOLOGY WITH HIGH DENSITY META...

MULTIPLE VIA STRUCTURE FOR HIGH PERFORMANCE STANDARD CELLS

VISIBLE ALIGNMENT MARKERS/LANDMARKS FOR CAD-TO-SILICON BACKSIDE IMA...

STANDARD CELL ARCHITECTURE FOR PARASITIC RESISTANCE REDUCTION

METAL OXIDE SEMICONDUCTOR CELL DEVICE ARCHITECTURE WITH MIXED DIFFU...

POWER RAIL INBOUND MIDDLE OF LINE (MOL) ROUTING

HYBRID COLORING METHODOLOGY FOR MULTI-PATTERN TECHNOLOGY