Hyun-Mog Park

Person

Beaverton, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Forming a porous dielectric layer and structures formed thereby
- Patent number 7,544,896
- Issue date Jun 9, 2009
- Intel Corporation
- Boyan Boyanov
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Sealing porous dielectric material using plasma-induced surface pol...
- Patent number 7,335,586
- Issue date Feb 26, 2008
- Intel Corporation
- Vijayakumar S. RamachandraRao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Air gap interconnect structure and method
- Patent number 7,332,406
- Issue date Feb 19, 2008
- Intel Corporation
- Hyun-Mog Park
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Via etch process
- Patent number 7,303,648
- Issue date Dec 4, 2007
- Intel Corporation
- Hyun-Mog Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Forming thin hard mask over air gap or porous dielectric
- Patent number 7,238,604
- Issue date Jul 3, 2007
- Intel Corporation
- Grant M. Kloster
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Forming a porous dielectric layer and structures formed thereby
- Patent number 7,179,755
- Issue date Feb 20, 2007
- Intel Corporation
- Boyan Boyanov
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dielectric with sidewall passivating layer
- Patent number 7,176,122
- Issue date Feb 13, 2007
- Intel Corporation
- Hyun-Mog Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interconnect structure for an integrated circuit and method of fabr...
- Patent number 7,151,051
- Issue date Dec 19, 2006
- Intel Corporation
- Jun He
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Supercritical carbon dioxide to reduce line edge roughness
- Patent number 7,049,053
- Issue date May 23, 2006
- Intel Corporation
- Vijayakumar Ramachandrarao
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Interconnect structure for an integrated circuit and method of fabr...
- Patent number 6,919,637
- Issue date Jul 19, 2005
- Intel Corporation
- Jun He
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device having a region of a material which is vaporiz...
- Patent number 6,903,461
- Issue date Jun 7, 2005
- Intel Corporation
- Grant M. Kloster
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Creating air gap in multi-level metal interconnects using electron...
- Patent number 6,867,125
- Issue date Mar 15, 2005
- Intel Corporation
- Grant Kloster
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Air gap interconnect method
- Patent number 6,861,332
- Issue date Mar 1, 2005
- Intel Corporation
- Hyun-Mog Park
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Method of making a semiconductor device by forming a masking layer...
- Patent number 6,774,032
- Issue date Aug 10, 2004
- Intel Corporation
- Hyun-Mog Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making a semiconductor device by forming a masking layer...
- Patent number 6,743,712
- Issue date Jun 1, 2004
- Intel Corporation
- Hyun-Mog Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming an air gap within a structure by exposing an ultr...
- Patent number 6,734,094
- Issue date May 11, 2004
- Intel Corporation
- Grant M. Kloster
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for controlling etch bias of carbon doped oxide films
- Patent number 6,620,741
- Issue date Sep 16, 2003
- Intel Corporation
- David H. Gracias
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Dielectric with sidewall passivating layer
- Publication number 20070042598
- Publication date Feb 22, 2007
- Hyun-Mog Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Sealing porous dielectric material using plasma-induced surface pol...
- Publication number 20060281329
- Publication date Dec 14, 2006
- Vijayakumar S. RamachandraRao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Etch stopless dual damascene structure and method of fabrication
- Publication number 20060216929
- Publication date Sep 28, 2006
- Hyun-Mog Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Forming a porous dielectric layer and structures formed thereby
- Publication number 20060145304
- Publication date Jul 6, 2006
- Boyan Boyanov
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Forming a porous dielectric layer and structures formed thereby
- Publication number 20060145305
- Publication date Jul 6, 2006
- Intel Corporation
- Boyan Boyanov
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Interconnects having a recessed capping layer and methods of fabric...
- Publication number 20060128144
- Publication date Jun 15, 2006
- Hyun-Mog Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Etch method to minimize hard mask undercut
- Publication number 20050274691
- Publication date Dec 15, 2005
- Hyun-Mog Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Via etch process
- Publication number 20050274690
- Publication date Dec 15, 2005
- Hyun-Mog Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Interconnect structure for an integrated circuit and method of fabr...
- Publication number 20050221604
- Publication date Oct 6, 2005
- Jun He
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Creating air gap in multi-level metal interconnects using electron...
- Publication number 20050164489
- Publication date Jul 28, 2005
- Grant Kloster
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Air gap interconnect structure and method
- Publication number 20050106852
- Publication date May 19, 2005
- Hyun-Mog Park
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
Supercritical carbon dioxide to reduce line edge roughness
- Publication number 20040253550
- Publication date Dec 16, 2004
- Vijayakumar Ramachandrarao
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Forming thin hard mask over air gap or porous dielectric
- Publication number 20040214427
- Publication date Oct 28, 2004
- Grant M. Kloster
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Dielectric with sidewall passivating layer
- Publication number 20040175925
- Publication date Sep 9, 2004
- Hyun-Mog Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Forming openings within integrated circuits
- Publication number 20040132276
- Publication date Jul 8, 2004
- Grant M. Kloster
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Air gap interconnect structure and method
- Publication number 20040099951
- Publication date May 27, 2004
- Hyun-Mog Park
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
Creating air gap in multi-level metal interconnects using electron...
- Publication number 20040063305
- Publication date Apr 1, 2004
- Grant Kloster
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Interconnect structure for an integrated circuit and method of fabr...
- Publication number 20040061231
- Publication date Apr 1, 2004
- Jun He
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF MAKING A SEMICONDUCTOR DEVICE BY FORMING A MASKING LAYER...
- Publication number 20040009662
- Publication date Jan 15, 2004
- Hyun-Mog Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Forming openings within integrated circuits
- Publication number 20030203592
- Publication date Oct 30, 2003
- Grant M. Kloster
- H01 - BASIC ELECTRIC ELEMENTS

Hyun-Mog Park

Person

Patents Grantslast 30 patents

Forming a porous dielectric layer and structures formed thereby

Sealing porous dielectric material using plasma-induced surface pol...

Air gap interconnect structure and method

Via etch process

Forming thin hard mask over air gap or porous dielectric

Forming a porous dielectric layer and structures formed thereby

Dielectric with sidewall passivating layer

Interconnect structure for an integrated circuit and method of fabr...

Supercritical carbon dioxide to reduce line edge roughness

Interconnect structure for an integrated circuit and method of fabr...

Semiconductor device having a region of a material which is vaporiz...

Creating air gap in multi-level metal interconnects using electron...

Air gap interconnect method

Method of making a semiconductor device by forming a masking layer...

Method of making a semiconductor device by forming a masking layer...

Method of forming an air gap within a structure by exposing an ultr...

Method for controlling etch bias of carbon doped oxide films

Patents Applicationslast 30 patents

Dielectric with sidewall passivating layer

Sealing porous dielectric material using plasma-induced surface pol...

Etch stopless dual damascene structure and method of fabrication

Forming a porous dielectric layer and structures formed thereby

Forming a porous dielectric layer and structures formed thereby

Interconnects having a recessed capping layer and methods of fabric...

Etch method to minimize hard mask undercut

Via etch process

Interconnect structure for an integrated circuit and method of fabr...

Creating air gap in multi-level metal interconnects using electron...

Air gap interconnect structure and method

Supercritical carbon dioxide to reduce line edge roughness

Forming thin hard mask over air gap or porous dielectric

Dielectric with sidewall passivating layer

Forming openings within integrated circuits

Air gap interconnect structure and method

Creating air gap in multi-level metal interconnects using electron...

Interconnect structure for an integrated circuit and method of fabr...

METHOD OF MAKING A SEMICONDUCTOR DEVICE BY FORMING A MASKING LAYER...

Forming openings within integrated circuits