Ian D. O'Connor

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Jassans-Riottier, FR

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Patents Grantslast 30 patents

Information Patent Grant
Interconnected array of logic cells reconfigurable with intersectin...
- Patent number 8,742,789
- Issue date Jun 3, 2014
- Ecole Centrale de Lyon
- Ian O'Connor
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Reconfigurable logic cell made up of double-gate MOSFET transistors
- Patent number 7,859,308
- Issue date Dec 28, 2010
- Ecole Centrale de Lyon
- Ian D. O'Connor
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
INTERCONNECTED ARRAY OF LOGIC CELLS RECONFIGURABLE WITH INTERSECTIN...
- Publication number 20120326749
- Publication date Dec 27, 2012
- Ecole Centrale de Lyon
- Ian O'Connor
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RECONFIGURABLE LOGIC CELL MADE UP OF DOUBLE-GATE MOSFET TRANSISTORS
- Publication number 20100194430
- Publication date Aug 5, 2010
- Ecole Centrale de Lyon
- Ian D. O'Connor
- H03 - BASIC ELECTRONIC CIRCUITRY