Ian Victor Devereux

Person

Fulbourn, GB

People

Patents Grantslast 30 patents

Information Patent Grant
Multiple GPU graphics processing system
- Patent number 10,475,147
- Issue date Nov 12, 2019
- ARM Limited
- Steven John Price
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Thread issue control
- Patent number 9,753,735
- Issue date Sep 5, 2017
- ARM Limited
- Andreas Due Engh-Halstvedt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Forward pixel killing
- Patent number 9,619,929
- Issue date Apr 11, 2017
- ARM Limited
- Ian Victor Devereux
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Performance of accesses from multiple processors to a same memory l...
- Patent number 9,146,870
- Issue date Sep 29, 2015
- ARM Limited
- Hedley James Francis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Forming a windowing display in a frame buffer
- Patent number 8,803,898
- Issue date Aug 12, 2014
- ARM Limited
- David Robert Shreiner
- G09 - EDUCATION CRYPTOGRAPHY DISPLAY ADVERTISING SEALS
Information Patent Grant
Synchronization between pipelines in a data processing apparatus ut...
- Patent number 7,490,221
- Issue date Feb 10, 2009
- ARM Limited
- Martin Robert Evans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bus transaction management within data processing systems
- Patent number 7,213,095
- Issue date May 1, 2007
- ARM Limited
- Peter Guy Middleton
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Synchronising pipelines in a data processing apparatus
- Patent number 7,024,543
- Issue date Apr 4, 2006
- ARM Limited
- Richard Roy Grisenthwaite
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for facilitating debugging of sequences of pro...
- Patent number 7,020,768
- Issue date Mar 28, 2006
- ARM Limited
- Andrew Brookfield Swaine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Early condition code evaluation at pipeline stages generating pass...
- Patent number 6,981,131
- Issue date Dec 27, 2005
- ARM Limited
- Ian Victor Devereux
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Management of caches in a data processing apparatus
- Patent number 6,954,828
- Issue date Oct 11, 2005
- ARM Limited
- Ian Victor Devereux
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Entry lockdown within a translation lookaside buffer mechanism
- Patent number 6,941,442
- Issue date Sep 6, 2005
- ARM Limited
- Ian Victor Devereux
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data processing apparatus and method for saving return state
- Patent number 6,904,517
- Issue date Jun 7, 2005
- ARM Limited
- Edward Colles Nevill
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit and method of operation of such a circuit employ...
- Patent number 6,691,270
- Issue date Feb 10, 2004
- ARM Limited
- Conrado Blasco Allué
- G01 - MEASURING TESTING
Information Patent Grant
Management of caches in a data processing apparatus
- Patent number 6,671,779
- Issue date Dec 30, 2003
- ARM Limited
- Ian Victor Devereux
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Asynchronous first-in-first-out buffer circuit burst mode control
- Patent number 6,058,439
- Issue date May 2, 2000
- ARM Limited
- Ian Victor Devereux
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data processing apparatus and method for pre-fetching an instructio...
- Patent number 5,961,631
- Issue date Oct 5, 1999
- ARM Limited
- Ian Victor Devereux
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
GRAPHICS PROCESSING SYSTEMS
- Publication number 20170236244
- Publication date Aug 17, 2017
- ARM Limited
- Steven Price
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
THREAD ISSUE CONTROL
- Publication number 20150227376
- Publication date Aug 13, 2015
- ARM Limited
- Andreas Due ENGH-HALSTVEDT
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FORWARD PIXEL KILLING
- Publication number 20150130802
- Publication date May 14, 2015
- ARM Limited
- Ian Victor DEVEREUX
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PERFORMANCE OF ACCESSES FROM MULTIPLE PROCESSORS TO A SAME MEMORY L...
- Publication number 20150032970
- Publication date Jan 29, 2015
- ARM Limited
- Hedley James Francis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Forming a windowing display in a frame buffer
- Publication number 20110148892
- Publication date Jun 23, 2011
- ARM Limited
- David Robert Shreiner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Bus transaction management within data processing systems
- Publication number 20050273543
- Publication date Dec 8, 2005
- ARM Limited
- Peter Guy Middleton
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Synchronising pipelines in a data processing apparatus
- Publication number 20040054876
- Publication date Mar 18, 2004
- Richard Roy Grisenthwaite
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Evaluation of condition codes in a data processing apparatus
- Publication number 20040044884
- Publication date Mar 4, 2004
- Ian Victor Devereux
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Synchronisation between pipelines in a data processing apparatus
- Publication number 20040044878
- Publication date Mar 4, 2004
- Martin Robert Evans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Management of caches in a data processing apparatus
- Publication number 20040030836
- Publication date Feb 12, 2004
- ARM Limited
- Ian Victor Devereux
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Entry lockdown within a translation lookaside buffer mechanism
- Publication number 20040024986
- Publication date Feb 5, 2004
- Ian Victor Devereux
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus and method for facilitating debugging of sequences of pro...
- Publication number 20020184477
- Publication date Dec 5, 2002
- Andrew Brookfield Swaine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Integrated circuit and method of operation of such a circuit
- Publication number 20020124216
- Publication date Sep 5, 2002
- Conrado Blasco Allue
- G01 - MEASURING TESTING
Information Patent Application
Data processing apparatus and method for saving return state
- Publication number 20020099933
- Publication date Jul 25, 2002
- Edward Colles Nevill
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Management of caches in a data processing apparatus
- Publication number 20020046326
- Publication date Apr 18, 2002
- Ian Victor Devereux
- G06 - COMPUTING CALCULATING COUNTING

Ian Victor Devereux

Person

Patents Grantslast 30 patents

Multiple GPU graphics processing system

Thread issue control

Forward pixel killing

Performance of accesses from multiple processors to a same memory l...

Forming a windowing display in a frame buffer

Synchronization between pipelines in a data processing apparatus ut...

Bus transaction management within data processing systems

Synchronising pipelines in a data processing apparatus

Apparatus and method for facilitating debugging of sequences of pro...

Early condition code evaluation at pipeline stages generating pass...

Management of caches in a data processing apparatus

Entry lockdown within a translation lookaside buffer mechanism

Data processing apparatus and method for saving return state

Integrated circuit and method of operation of such a circuit employ...

Management of caches in a data processing apparatus

Asynchronous first-in-first-out buffer circuit burst mode control

Data processing apparatus and method for pre-fetching an instructio...

Patents Applicationslast 30 patents

GRAPHICS PROCESSING SYSTEMS

THREAD ISSUE CONTROL

FORWARD PIXEL KILLING

PERFORMANCE OF ACCESSES FROM MULTIPLE PROCESSORS TO A SAME MEMORY L...

Forming a windowing display in a frame buffer

Bus transaction management within data processing systems

Synchronising pipelines in a data processing apparatus

Evaluation of condition codes in a data processing apparatus

Synchronisation between pipelines in a data processing apparatus

Management of caches in a data processing apparatus

Entry lockdown within a translation lookaside buffer mechanism

Apparatus and method for facilitating debugging of sequences of pro...

Integrated circuit and method of operation of such a circuit

Data processing apparatus and method for saving return state

Management of caches in a data processing apparatus