Ichirou Ishimaru

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Mure, JP

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Patents Grantslast 30 patents

Information Patent Grant
Method for analyzing circuit pattern defects and a system thereof
- Patent number 7,352,890
- Issue date Apr 1, 2008
- Hitachi, Ltd.
- Atsushi Shimoda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for analyzing circuit pattern defects
- Patent number 7,062,081
- Issue date Jun 13, 2006
- Hitachi, Ltd.
- Atsushi Shimoda
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Method for analyzing circuit pattern defects and a system thereof
- Publication number 20060140472
- Publication date Jun 29, 2006
- Atsushi Shimoda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for analyzing circuit pattern defects and a system thereof
- Publication number 20010016061
- Publication date Aug 23, 2001
- Atsushi Shimoda
- G06 - COMPUTING CALCULATING COUNTING