ILAN PARDO

Person

Ramat-Hasharon, IL

People

Patents Grantslast 30 patents

Information Patent Grant
Peripheral component interconnect attributes shared using address bits
- Patent number 11,762,785
- Issue date Sep 19, 2023
- Mellanox Technologies, Ltd.
- Idan Burstein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor with conditional-fence commands excluding designated memo...
- Patent number 11,580,036
- Issue date Feb 14, 2023
- Mellanox Technologies, Ltd.
- Ilan Pardo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Expandable queue
- Patent number 11,558,309
- Issue date Jan 17, 2023
- Mellanox Technologies, Ltd.
- Ilan Pardo
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Payload cache
- Patent number 11,258,887
- Issue date Feb 22, 2022
- Mellanox Technologies, Ltd.
- Ilan Pardo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Prefetching of completion notifications and context
- Patent number 11,055,222
- Issue date Jul 6, 2021
- Mellanox Technologies, Ltd.
- Ilan Pardo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for a hybrid latency-throughput processor
- Patent number 10,664,284
- Issue date May 26, 2020
- Intel Corporation
- Oren Ben-Kiki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instructions and logic to provide atomic range modification operations
- Patent number 10,528,345
- Issue date Jan 7, 2020
- Intel Corporation
- Ilan Pardo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Implementing hierarchical PCI express switch topology over coherent...
- Patent number 10,394,747
- Issue date Aug 27, 2019
- MELLANOX TECHNOLOGIES LTD.
- Peter Paneah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for invocation of a multi threaded accelerator
- Patent number 10,346,195
- Issue date Jul 9, 2019
- Intel Corporation
- Oren Ben-Kiki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for a hybrid latency-throughput processor
- Patent number 10,255,077
- Issue date Apr 9, 2019
- Intel Corporation
- Oren Ben-Kiki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus to reduce idle link power in a platform
- Patent number 10,185,385
- Issue date Jan 22, 2019
- Intel Corporation
- Paul S. Diefenbaugh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction and logic for detecting numeric accumulation error
- Patent number 10,146,533
- Issue date Dec 4, 2018
- Intel Corporation
- Ilan Pardo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processing core having shared front end unit
- Patent number 10,140,129
- Issue date Nov 27, 2018
- Intel Corporation
- Ilan Pardo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory address collision detection of ordered parallel threads with...
- Patent number 10,101,999
- Issue date Oct 16, 2018
- Intel Corporation
- Enrique De Lucas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for low-latency invocation of accelerators
- Patent number 10,095,521
- Issue date Oct 9, 2018
- Intel Corporation
- Oren Ben-Kiki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for retrieving elements from a linked structure
- Patent number 10,095,517
- Issue date Oct 9, 2018
- Intel Corporation
- Oren Ben-Kiki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for low-latency invocation of accelerators
- Patent number 10,089,113
- Issue date Oct 2, 2018
- Intel Corporation
- Oren Ben-Kiki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for low-latency invocation of accelerators
- Patent number 10,083,037
- Issue date Sep 25, 2018
- Intel Corporation
- Oren Ben-Kiki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for enforcement of reserved bits
- Patent number 9,934,090
- Issue date Apr 3, 2018
- Intel Corporation
- Oren Ben-Kiki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
User-level fork and join processors, methods, systems, and instruct...
- Patent number 9,747,108
- Issue date Aug 29, 2017
- Intel Corporation
- Oren Ben-Kiki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory address collision detection of ordered parallel threads with...
- Patent number 9,542,193
- Issue date Jan 10, 2017
- Intel Corporation
- Enrique De Lucas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Atomic operations in PCI express
- Patent number 9,535,838
- Issue date Jan 3, 2017
- Intel Corporation
- Jasmin Ajanovic
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus for high bandwidth dictionary compression tech...
- Patent number 9,514,085
- Issue date Dec 6, 2016
- Intel Corporation
- Ilan Pardo
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Transaction layer packet formatting
- Patent number 9,442,855
- Issue date Sep 13, 2016
- Intel Corporation
- Jasmin Ajanovic
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Apparatus and method for a hybrid latency-throughput processor
- Patent number 9,417,873
- Issue date Aug 16, 2016
- Intel Corporation
- Oren Ben-Kiki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus to reduce idle link power in a platform
- Patent number 9,367,116
- Issue date Jun 14, 2016
- Intel Corporation
- Paul S. Diefenbaugh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for low-latency invocation of accelerators
- Patent number 9,361,116
- Issue date Jun 7, 2016
- Intel Corporation
- Oren Ben-Kiki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compression format for high bandwidth dictionary compression
- Patent number 9,306,598
- Issue date Apr 5, 2016
- Intel Corporation
- Ilan Pardo
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus to reduce idle link power in a platform
- Patent number 9,280,198
- Issue date Mar 8, 2016
- Intel Corporation
- Paul S. Diefenbaugh
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Snoop filter having centralized translation circuitry and shadow ta...
- Patent number 9,268,697
- Issue date Feb 23, 2016
- Intel Corporation
- Ilan Pardo
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
PROGRAMMABLE CORE INTEGRATED WITH HARDWARE PIPELINE OF NETWORK INTE...
- Publication number 20230418746
- Publication date Dec 28, 2023
- MELLANOX TECHNOLOGIES, LTD.
- Omri Kahalon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Processor Supporting Vectored System Calls
- Publication number 20230315547
- Publication date Oct 5, 2023
- MELLANOX TECHNOLOGIES, LTD.
- Ilan Pardo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Processor with Instructions for Resetting Multiple Registers
- Publication number 20230315457
- Publication date Oct 5, 2023
- MELLANOX TECHNOLOGIES, LTD.
- Ilan Pardo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Confidential Computing with Device Memory Isolation
- Publication number 20230267196
- Publication date Aug 24, 2023
- MELLANOX TECHNOLOGIES, LTD.
- Boris Pismenny
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MATRIX AND VECTOR MANIPULATION TO SUPPORT MACHINE LEARNING INFERENC...
- Publication number 20230110316
- Publication date Apr 13, 2023
- MELLANOX TECHNOLOGIES, LTD.
- Ilan Pardo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VECTOR ACTIVATION FUNCTION TO SUPPORT MACHINE LEARNING INFERENCE AN...
- Publication number 20230110285
- Publication date Apr 13, 2023
- MELLANOX TECHNOLOGIES, LTD.
- Ilan Pardo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Processor with conditional-fence commands excluding designated memo...
- Publication number 20230036954
- Publication date Feb 2, 2023
- MELLANOX TECHNOLOGIES, LTD.
- Ilan Pardo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Expandable Queue
- Publication number 20230010161
- Publication date Jan 12, 2023
- MELLANOX TECHNOLOGIES, LTD.
- Ilan Pardo
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
PERIPHERAL COMPONENT INTERCONNECT ATTRIBUTES SHARED USING ADDRESS BITS
- Publication number 20220350756
- Publication date Nov 3, 2022
- MELLANOX TECHNOLOGIES LTD.
- Idan Burstein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Payload cache
- Publication number 20210400124
- Publication date Dec 23, 2021
- MELLANOX TECHNOLOGIES, LTD.
- Ilan Pardo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Cache stashing system
- Publication number 20210397560
- Publication date Dec 23, 2021
- MELLANOX TECHNOLOGIES, LTD.
- Ilan Pardo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Prefetching of completion notifications and context
- Publication number 20210073130
- Publication date Mar 11, 2021
- MELLANOX TECHNOLOGIES, LTD.
- Ilan Pardo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR A HYBRID LATENCY-THROUGHPUT PROCESSOR
- Publication number 20190196838
- Publication date Jun 27, 2019
- Intel Corporation
- OREN BEN-KIKI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSING CORE HAVING SHARED FRONT END UNIT
- Publication number 20190171462
- Publication date Jun 6, 2019
- Intel Corporation
- ILAN PARDO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Instruction and Logic for Detecting Numeric Accumulation Error
- Publication number 20180088941
- Publication date Mar 29, 2018
- Intel Corporation
- ILAN PARDO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR ENFORCEMENT OF RESERVED BITS
- Publication number 20170177439
- Publication date Jun 22, 2017
- Intel Corporation
- OREN BEN-KIKI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR RETRIEVING ELEMENTS FROM A LINKED STRUCTURE
- Publication number 20170177341
- Publication date Jun 22, 2017
- Intel Corporation
- OREN BEN-KIKI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY ADDRESS COLLISION DETECTION OF ORDERED PARALLEL THREADS WITH...
- Publication number 20170147344
- Publication date May 25, 2017
- Intel Corporation
- ENRIQUE DE LUCAS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS TO REDUCE IDLE LINK POWER IN A PLATFORM
- Publication number 20170123475
- Publication date May 4, 2017
- Intel Corporation
- Paul S. Diefenbaugh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR LOW-LATENCY INVOCATION OF ACCELERATORS
- Publication number 20170017491
- Publication date Jan 19, 2017
- Oren Ben-Kiki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR LOW-LATENCY INVOCATION OF ACCELERATORS
- Publication number 20170017492
- Publication date Jan 19, 2017
- Oren Ben-Kiki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus and Method for a Hybrid Latency-Throughput Processor
- Publication number 20160342419
- Publication date Nov 24, 2016
- Intel Corporation
- Ben Oren-Kiki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTIONS AND LOGIC TO PROVIDE ATOMIC RANGE OPERATIONS
- Publication number 20160283237
- Publication date Sep 29, 2016
- Ilan Pardo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
USER-LEVEL FORK AND JOIN PROCESSORS, METHODS, SYSTEMS, AND INSTRUCT...
- Publication number 20160283245
- Publication date Sep 29, 2016
- Intel Corporation
- Oren Ben-Kiki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AN APPARATUS TO REDUCE IDLE LINK POWER IN A PLATFORM
- Publication number 20160109925
- Publication date Apr 21, 2016
- Intel Corporation
- Paul S. Diefenbaugh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PCI EXPRESS PREFETCHING
- Publication number 20150161050
- Publication date Jun 11, 2015
- Intel Corporation
- Jasmin Ajanovic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PCI EXPRESS TRANSACTION DESCRIPTOR
- Publication number 20150149683
- Publication date May 28, 2015
- Intel Corporation
- Jasmin Ajanovic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS TO REDUCE IDLE LINK POWER IN A PLATFORM
- Publication number 20140310543
- Publication date Oct 16, 2014
- Paul S. Diefenbaugh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Snoop Filter Having Centralized Translation Circuitry and Shadow Ta...
- Publication number 20140189254
- Publication date Jul 3, 2014
- Ilan PARDO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR LOW-LATENCY INVOCATION OF ACCELERATORS
- Publication number 20140189332
- Publication date Jul 3, 2014
- Oren Ben-Kiki
- G06 - COMPUTING CALCULATING COUNTING

Person

Patents Grantslast 30 patents

Peripheral component interconnect attributes shared using address bits

Processor with conditional-fence commands excluding designated memo...

Expandable queue

Payload cache

Prefetching of completion notifications and context

Apparatus and method for a hybrid latency-throughput processor

Instructions and logic to provide atomic range modification operations

Implementing hierarchical PCI express switch topology over coherent...

Apparatus and method for invocation of a multi threaded accelerator

Apparatus and method for a hybrid latency-throughput processor

Method and apparatus to reduce idle link power in a platform

Instruction and logic for detecting numeric accumulation error

Processing core having shared front end unit

Memory address collision detection of ordered parallel threads with...

Apparatus and method for low-latency invocation of accelerators

Apparatus and method for retrieving elements from a linked structure

Apparatus and method for low-latency invocation of accelerators

Apparatus and method for low-latency invocation of accelerators

Apparatus and method for enforcement of reserved bits

User-level fork and join processors, methods, systems, and instruct...

Memory address collision detection of ordered parallel threads with...

Atomic operations in PCI express

Method and apparatus for high bandwidth dictionary compression tech...

Transaction layer packet formatting

Apparatus and method for a hybrid latency-throughput processor

Apparatus to reduce idle link power in a platform

Apparatus and method for low-latency invocation of accelerators

Compression format for high bandwidth dictionary compression

Method and apparatus to reduce idle link power in a platform

Snoop filter having centralized translation circuitry and shadow ta...

Patents Applicationslast 30 patents

PROGRAMMABLE CORE INTEGRATED WITH HARDWARE PIPELINE OF NETWORK INTE...

Processor Supporting Vectored System Calls

Processor with Instructions for Resetting Multiple Registers

Confidential Computing with Device Memory Isolation

MATRIX AND VECTOR MANIPULATION TO SUPPORT MACHINE LEARNING INFERENC...

VECTOR ACTIVATION FUNCTION TO SUPPORT MACHINE LEARNING INFERENCE AN...

Processor with conditional-fence commands excluding designated memo...

Expandable Queue

PERIPHERAL COMPONENT INTERCONNECT ATTRIBUTES SHARED USING ADDRESS BITS

Payload cache

Cache stashing system

Prefetching of completion notifications and context

APPARATUS AND METHOD FOR A HYBRID LATENCY-THROUGHPUT PROCESSOR

PROCESSING CORE HAVING SHARED FRONT END UNIT

Instruction and Logic for Detecting Numeric Accumulation Error

APPARATUS AND METHOD FOR ENFORCEMENT OF RESERVED BITS

APPARATUS AND METHOD FOR RETRIEVING ELEMENTS FROM A LINKED STRUCTURE

MEMORY ADDRESS COLLISION DETECTION OF ORDERED PARALLEL THREADS WITH...

METHOD AND APPARATUS TO REDUCE IDLE LINK POWER IN A PLATFORM

APPARATUS AND METHOD FOR LOW-LATENCY INVOCATION OF ACCELERATORS

APPARATUS AND METHOD FOR LOW-LATENCY INVOCATION OF ACCELERATORS

Apparatus and Method for a Hybrid Latency-Throughput Processor

INSTRUCTIONS AND LOGIC TO PROVIDE ATOMIC RANGE OPERATIONS

USER-LEVEL FORK AND JOIN PROCESSORS, METHODS, SYSTEMS, AND INSTRUCT...

AN APPARATUS TO REDUCE IDLE LINK POWER IN A PLATFORM

PCI EXPRESS PREFETCHING

PCI EXPRESS TRANSACTION DESCRIPTOR

METHOD AND APPARATUS TO REDUCE IDLE LINK POWER IN A PLATFORM

Snoop Filter Having Centralized Translation Circuitry and Shadow Ta...

APPARATUS AND METHOD FOR LOW-LATENCY INVOCATION OF ACCELERATORS