ILAN TAYARI

Person

Tzur Hadassah, IL

People

Patents Grantslast 30 patents

Information Patent Grant
Interconnected memory grid with bypassable units
- Patent number 12,056,376
- Issue date Aug 6, 2024
- Next Silicon Ltd
- Yoav Lossin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory management in a multi-processor environment
- Patent number 12,020,069
- Issue date Jun 25, 2024
- Next Silicon Ltd
- Elad Raz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Executing concurrent threads on a reconfigurable processing grid
- Patent number 11,875,153
- Issue date Jan 16, 2024
- Next Silicon Ltd
- Elad Raz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interconnected memory grid with bypassable units
- Patent number 11,644,990
- Issue date May 9, 2023
- Next Silicon Ltd
- Yoav Lossin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic allocation of executable code for multiarchitecture heterog...
- Patent number 11,630,669
- Issue date Apr 18, 2023
- Next Silicon Ltd
- Elad Raz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Optimizing reconfigurable hardware using data sampling
- Patent number 11,294,686
- Issue date Apr 5, 2022
- Next Silicon Ltd
- Elad Raz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interconnected memory grid with bypassable units
- Patent number 11,269,526
- Issue date Mar 8, 2022
- Next Silicon Ltd
- Yoav Lossin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic allocation of executable code for multi-architecture hetero...
- Patent number 11,113,059
- Issue date Sep 7, 2021
- Next Silicon Ltd
- Elad Raz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Directed and interconnected grid dataflow architecture
- Patent number 10,817,344
- Issue date Oct 27, 2020
- Next Silicon Ltd
- Elad Raz
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
MEMORY MANAGEMENT IN A MULTI-PROCESSOR ENVIRONMENT
- Publication number 20240345881
- Publication date Oct 17, 2024
- Next Silicon Ltd
- Elad RAZ
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY MANAGEMENT IN A MULTI-PROCESSOR ENVIRONMENT
- Publication number 20240054015
- Publication date Feb 15, 2024
- Next Silicon Ltd
- Elad RAZ
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY AWARE CONTEXT SWITCHING
- Publication number 20240028389
- Publication date Jan 25, 2024
- Next Silicon Ltd
- Elad RAZ
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPTIMIZING RECONFIGURABLE HARDWARE USING DATA SAMPLING
- Publication number 20230342157
- Publication date Oct 26, 2023
- Next Silicon Ltd
- Elad RAZ
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTERCONNECTED MEMORY GRID WITH BYPASSABLE UNITS
- Publication number 20230273736
- Publication date Aug 31, 2023
- Next Silicon Ltd
- Yoav LOSSIN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC ALLOCATION OF EXECUTABLE CODE FOR MULTI-ARCHITECTURE HETERO...
- Publication number 20230229444
- Publication date Jul 20, 2023
- Next Silicon Ltd
- Elad RAZ
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EXTENDING PARALLEL SOFTWARE THREADS
- Publication number 20230229489
- Publication date Jul 20, 2023
- Next Silicon Ltd
- Elad RAZ
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC ALLOCATION OF EXECUTABLE CODE FOR MULTI-ARCHITECTURE HETERO...
- Publication number 20220253312
- Publication date Aug 11, 2022
- Next Silicon Ltd
- Elad RAZ
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTERCONNECTED MEMORY GRID WITH BYPASSABLE UNITS
- Publication number 20220155985
- Publication date May 19, 2022
- Next Silicon Ltd
- Yoav LOSSIN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTERCONNECTED MEMORY GRID WITH BYPASSABLE UNITS
- Publication number 20210334023
- Publication date Oct 28, 2021
- Next Silicon Ltd
- Yoav LOSSIN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DIRECTED AND INTERCONNECTED GRID DATAFLOW ARCHITECTURE
- Publication number 20190079803
- Publication date Mar 14, 2019
- Next Silicon, Ltd.
- Elad RAZ
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDWARE LOCKING PRIMITIVE SYSTEM FOR HARDWARE AND METHODS FOR GENE...
- Publication number 20190042332
- Publication date Feb 7, 2019
- Next Silicon, Ltd.
- Elad RAZ
- G06 - COMPUTING CALCULATING COUNTING

ILAN TAYARI

Person

Patents Grantslast 30 patents

Interconnected memory grid with bypassable units

Memory management in a multi-processor environment

Executing concurrent threads on a reconfigurable processing grid

Interconnected memory grid with bypassable units

Dynamic allocation of executable code for multiarchitecture heterog...

Optimizing reconfigurable hardware using data sampling

Interconnected memory grid with bypassable units

Dynamic allocation of executable code for multi-architecture hetero...

Directed and interconnected grid dataflow architecture

Patents Applicationslast 30 patents

MEMORY MANAGEMENT IN A MULTI-PROCESSOR ENVIRONMENT

MEMORY MANAGEMENT IN A MULTI-PROCESSOR ENVIRONMENT

MEMORY AWARE CONTEXT SWITCHING

OPTIMIZING RECONFIGURABLE HARDWARE USING DATA SAMPLING

INTERCONNECTED MEMORY GRID WITH BYPASSABLE UNITS

DYNAMIC ALLOCATION OF EXECUTABLE CODE FOR MULTI-ARCHITECTURE HETERO...

EXTENDING PARALLEL SOFTWARE THREADS

DYNAMIC ALLOCATION OF EXECUTABLE CODE FOR MULTI-ARCHITECTURE HETERO...

INTERCONNECTED MEMORY GRID WITH BYPASSABLE UNITS

INTERCONNECTED MEMORY GRID WITH BYPASSABLE UNITS

DIRECTED AND INTERCONNECTED GRID DATAFLOW ARCHITECTURE

HARDWARE LOCKING PRIMITIVE SYSTEM FOR HARDWARE AND METHODS FOR GENE...