Ilya K. Ganusov

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Debug trace microsectors
- Patent number 12,248,021
- Issue date Mar 11, 2025
- Altera Corporation
- Sean R. Atsatt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
At-speed burst sampling for user registers
- Patent number 12,197,360
- Issue date Jan 14, 2025
- Altera Corporation
- Bee Yee Ng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Micro-network-on-chip and microsector infrastructure
- Patent number 12,164,462
- Issue date Dec 10, 2024
- Altera Corporation
- Ilya K. Ganusov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Logic fabric based on microsector infrastructure with data register...
- Patent number 11,960,734
- Issue date Apr 16, 2024
- Intel Corporation
- Sean R Atsatt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Soft network-on-chip overlay through a partial reconfiguration region
- Patent number 11,901,896
- Issue date Feb 13, 2024
- Intel Corporation
- Scott Jeremy Weber
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Three dimensional circuit systems and methods having memory hierarc...
- Patent number 11,789,641
- Issue date Oct 17, 2023
- Intel Corporation
- Scott Weber
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Configurable latch circuit
- Patent number 10,340,898
- Issue date Jul 2, 2019
- Xilinx, Inc.
- Ilya K. Ganusov
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable pipeline interface circuit
- Patent number 10,320,386
- Issue date Jun 11, 2019
- Xilinx, Inc.
- Ilya K. Ganusov
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Selectively providing clock signals using a programmable control ci...
- Patent number 10,284,185
- Issue date May 7, 2019
- Xilinx, Inc.
- Brian C. Gaide
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and circuits for preventing hold violations
- Patent number 10,230,374
- Issue date Mar 12, 2019
- Xilinx, Inc.
- Ilya K. Ganusov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multimode registers with pulse latches
- Patent number 10,069,486
- Issue date Sep 4, 2018
- Xilinx, Inc.
- Benjamin S. Devlin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Circuits for and methods of reducing power consumed by routing cloc...
- Patent number 10,049,177
- Issue date Aug 14, 2018
- Xilinx, Inc.
- Benjamin S. Devlin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and circuits for preventing hold time violations
- Patent number 9,954,534
- Issue date Apr 24, 2018
- Xilinx, Inc.
- Ilya K. Ganusov
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Folding duplicate instances of modules in a circuit design
- Patent number 9,875,330
- Issue date Jan 23, 2018
- Xilinx, Inc.
- Ilya K. Ganusov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Representation of complex timing characteristics of startpoint-endp...
- Patent number 9,842,187
- Issue date Dec 12, 2017
- Xilinx, Inc.
- Jindrich Zejda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable integrated circuit design flow using timing-driven pip...
- Patent number 9,836,568
- Issue date Dec 5, 2017
- Xilinx, Inc.
- Ilya K. Ganusov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multimode multiplexer-based circuit
- Patent number 9,729,153
- Issue date Aug 8, 2017
- Xilinx, Inc.
- Ilya K. Ganusov
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Circuits for and methods of reducing duty-cycle distortion in an in...
- Patent number 9,577,615
- Issue date Feb 21, 2017
- Xilinx, Inc.
- Ilya K. Ganusov
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Leaf-level generation of phase-shifted clocks using programmable cl...
- Patent number 9,537,491
- Issue date Jan 3, 2017
- Xilinx, Inc.
- Ilya K. Ganusov
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Configurable latch circuit
- Patent number 9,531,351
- Issue date Dec 27, 2016
- Xilinx, Inc.
- Benjamin S. Devlin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Increasing operating frequency of circuit designs using dynamically...
- Patent number 9,372,953
- Issue date Jun 21, 2016
- Xilinx, Inc.
- Shant Chandrakar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable delay circuit block
- Patent number 9,118,310
- Issue date Aug 25, 2015
- Xilinx, Inc.
- Ilya K. Ganusov
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Circuits for and methods of routing signals in an integrated circuit
- Patent number 8,988,125
- Issue date Mar 24, 2015
- Xilinx, Inc.
- Ilya K. Ganusov
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Circuits for and methods of asychronously transmitting data in an i...
- Patent number 8,928,386
- Issue date Jan 6, 2015
- Xilinx, Inc.
- Ilya Ganusov
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Non-predicated to predicated conversion of asynchronous representat...
- Patent number 8,191,019
- Issue date May 29, 2012
- Achronix Semiconductor Corporation
- Rajit Manohar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Asynchronous conversion circuitry apparatus, systems, and methods
- Patent number 8,078,899
- Issue date Dec 13, 2011
- Achronix Semiconductor Corporation
- Rajit Manohar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Asynchronous conversion circuitry apparatus, systems, and methods
- Patent number 7,900,078
- Issue date Mar 1, 2011
- Achronix Semiconductor Corporation
- Rajit Manohar
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
SUMMATION AND FLOATING POINT CONVERSION OF TENSOR RESULTS
- Publication number 20250045017
- Publication date Feb 6, 2025
- Altera Corporation
- Martin Langhammer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MICRO-NETWORK-ON-CHIP AND MICROSECTOR INFRASTRUCTURE
- Publication number 20250036591
- Publication date Jan 30, 2025
- Intel Corporation
- Ilya K. Ganusov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Programmable Logic Circuits Using Lookup Tables (LUTs) Augmented wi...
- Publication number 20240354480
- Publication date Oct 24, 2024
- Jeffrey Chromczak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Enhanced Adaptive Logic Circuitry with Improved Function Coverage a...
- Publication number 20240348252
- Publication date Oct 17, 2024
- Jeffrey Chromczak
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
LOGIC FABRIC BASED ON MICROSECTOR INFRASTRUCTURE WITH DATA REGISTER...
- Publication number 20240241650
- Publication date Jul 18, 2024
- Intel Corporation
- Sean R. Atsatt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Techniques For Storing States Of Signals In Configurable Storage Ci...
- Publication number 20240137026
- Publication date Apr 25, 2024
- Altera Corporation
- Bee Yee Ng
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Three Dimensional Circuit Systems And Methods Having Memory Hierarc...
- Publication number 20220405005
- Publication date Dec 22, 2022
- Intel Corporation
- Scott Weber
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Heterogeneous Timing Closure For Clock-Skew Scheduling or Time Borr...
- Publication number 20220334609
- Publication date Oct 20, 2022
- Intel Corporation
- Ilya K. Ganusov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Fabric Memory Network-On-Chip Extension to ALM Registers and LUTRAM
- Publication number 20220244867
- Publication date Aug 4, 2022
- Bee Yee Ng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FABRIC MEMORY NETWORK-ON-CHIP
- Publication number 20220221986
- Publication date Jul 14, 2022
- Scott Jeremy Weber
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DEBUG TRACE MICROSECTORS
- Publication number 20220196735
- Publication date Jun 23, 2022
- Intel Corporation
- Sean R. Atsatt
- G01 - MEASURING TESTING
Information Patent Application
MICRO-NETWORK-ON-CHIP AND MICROSECTOR INFRASTRUCTURE
- Publication number 20220197855
- Publication date Jun 23, 2022
- Intel Corporation
- Ilya K. Ganusov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Circuits And Methods For Configurable Scan Chains
- Publication number 20220187370
- Publication date Jun 16, 2022
- Intel Corporation
- Bee Yee Ng
- G01 - MEASURING TESTING
Information Patent Application
Systems And Methods For Configurable Interface Circuits
- Publication number 20220109446
- Publication date Apr 7, 2022
- Intel Corporation
- Paul Rotker
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Systems and Methods for Sparsity Operations in a Specialized Proces...
- Publication number 20220012012
- Publication date Jan 13, 2022
- Martin Langhammer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AT-SPEED BURST SAMPLING FOR USER REGISTERS
- Publication number 20210326284
- Publication date Oct 21, 2021
- Intel Corporation
- Bee Yee Ng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SOFT NETWORK-ON-CHIP OVERLAY THROUGH A PARTIAL RECONFIGURATION REGION
- Publication number 20210320661
- Publication date Oct 14, 2021
- Intel Corporation
- Scott Jeremy Weber
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
LOGIC FABRIC BASED ON MICROSECTOR INFRASTRUCTURE WITH DATA REGISTER...
- Publication number 20210011636
- Publication date Jan 14, 2021
- Intel Corporation
- Sean R. Atsatt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROGRAMMABLE PIPELINE INTERFACE CIRCUIT
- Publication number 20190181863
- Publication date Jun 13, 2019
- Xilinx, Inc.
- Ilya K. Ganusov
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHODS AND CIRCUITS FOR PREVENTING HOLD TIME VIOLATIONS
- Publication number 20180083633
- Publication date Mar 22, 2018
- Xilinx, Inc.
- Ilya K. Ganusov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FOLDING DUPLICATE INSTANCES OF MODULES IN A CIRCUIT DESIGN
- Publication number 20170161419
- Publication date Jun 8, 2017
- Xilinx, Inc.
- Ilya K. Ganusov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ASYNCHRONOUS CONVERSION CIRCUITRY APPARATUS, SYSTEMS, AND METHODS
- Publication number 20110130171
- Publication date Jun 2, 2011
- ACHRONIX SEMICONDUCTOR CORPORATION
- Rajit Manohar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ASYNCHRONOUS CONVERSION CIRCUITRY APPARATUS, SYSTEMS, AND METHODS
- Publication number 20110062987
- Publication date Mar 17, 2011
- Rajit Manohar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NON-PREDICATED TO PREDICATED CONVERSION OF ASYNCHRONOUS REPRESENTAT...
- Publication number 20110012666
- Publication date Jan 20, 2011
- Rajit Manohar
- G06 - COMPUTING CALCULATING COUNTING

Ilya K. Ganusov

Person

Patents Grantslast 30 patents

Debug trace microsectors

At-speed burst sampling for user registers

Micro-network-on-chip and microsector infrastructure

Logic fabric based on microsector infrastructure with data register...

Soft network-on-chip overlay through a partial reconfiguration region

Three dimensional circuit systems and methods having memory hierarc...

Configurable latch circuit

Programmable pipeline interface circuit

Selectively providing clock signals using a programmable control ci...

Methods and circuits for preventing hold violations

Multimode registers with pulse latches

Circuits for and methods of reducing power consumed by routing cloc...

Methods and circuits for preventing hold time violations

Folding duplicate instances of modules in a circuit design

Representation of complex timing characteristics of startpoint-endp...

Programmable integrated circuit design flow using timing-driven pip...

Multimode multiplexer-based circuit

Circuits for and methods of reducing duty-cycle distortion in an in...

Leaf-level generation of phase-shifted clocks using programmable cl...

Configurable latch circuit

Increasing operating frequency of circuit designs using dynamically...

Programmable delay circuit block

Circuits for and methods of routing signals in an integrated circuit

Circuits for and methods of asychronously transmitting data in an i...

Non-predicated to predicated conversion of asynchronous representat...

Asynchronous conversion circuitry apparatus, systems, and methods

Asynchronous conversion circuitry apparatus, systems, and methods

Patents Applicationslast 30 patents

SUMMATION AND FLOATING POINT CONVERSION OF TENSOR RESULTS

MICRO-NETWORK-ON-CHIP AND MICROSECTOR INFRASTRUCTURE

Programmable Logic Circuits Using Lookup Tables (LUTs) Augmented wi...

Enhanced Adaptive Logic Circuitry with Improved Function Coverage a...

LOGIC FABRIC BASED ON MICROSECTOR INFRASTRUCTURE WITH DATA REGISTER...

Techniques For Storing States Of Signals In Configurable Storage Ci...

Three Dimensional Circuit Systems And Methods Having Memory Hierarc...

Heterogeneous Timing Closure For Clock-Skew Scheduling or Time Borr...

Fabric Memory Network-On-Chip Extension to ALM Registers and LUTRAM

FABRIC MEMORY NETWORK-ON-CHIP

DEBUG TRACE MICROSECTORS

MICRO-NETWORK-ON-CHIP AND MICROSECTOR INFRASTRUCTURE

Circuits And Methods For Configurable Scan Chains

Systems And Methods For Configurable Interface Circuits

Systems and Methods for Sparsity Operations in a Specialized Proces...

AT-SPEED BURST SAMPLING FOR USER REGISTERS

SOFT NETWORK-ON-CHIP OVERLAY THROUGH A PARTIAL RECONFIGURATION REGION

LOGIC FABRIC BASED ON MICROSECTOR INFRASTRUCTURE WITH DATA REGISTER...

PROGRAMMABLE PIPELINE INTERFACE CIRCUIT

METHODS AND CIRCUITS FOR PREVENTING HOLD TIME VIOLATIONS

FOLDING DUPLICATE INSTANCES OF MODULES IN A CIRCUIT DESIGN

ASYNCHRONOUS CONVERSION CIRCUITRY APPARATUS, SYSTEMS, AND METHODS

ASYNCHRONOUS CONVERSION CIRCUITRY APPARATUS, SYSTEMS, AND METHODS

NON-PREDICATED TO PREDICATED CONVERSION OF ASYNCHRONOUS REPRESENTAT...