Inbar Falkov

Person

Tel Aviv, IL

People

Patents Grantslast 30 patents

Information Patent Grant
Divider-less fractional PLL architecture
- Patent number 10,659,061
- Issue date May 19, 2020
- Intel Corporation
- Elias Nassar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus to utilize a digital-time-conversion (DTC) bas...
- Patent number 10,571,953
- Issue date Feb 25, 2020
- Intel Corporation
- Eyal Fayneh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scalable interleaved digital-to-time converter circuit for clock ge...
- Patent number 10,218,379
- Issue date Feb 26, 2019
- Intel Corporation
- Rotem Banin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Dyanamically adapting a voltage of a clock generation circuit
- Patent number 9,965,019
- Issue date May 8, 2018
- Intel Corporation
- Tapan A. Ganpule
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scalable interleaved digital-to-time converter circuit for clock ge...
- Patent number 9,941,898
- Issue date Apr 10, 2018
- Intel Corporation
- Rotem Banin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Fast digital to time converter linearity calibration to improve clo...
- Patent number 9,791,834
- Issue date Oct 17, 2017
- Intel Corporation
- Elias Nassar
- G04 - HOROLOGY
Information Patent Grant
Dyanamically adapting a voltage of a clock generation circuit
- Patent number 9,459,689
- Issue date Oct 4, 2016
- Intel Corporation
- Tapan A. Ganpule
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...

Patents Applicationslast 30 patents

Information Patent Application
DIVIDER-LESS FRACTIONAL PLL ARCHITECTURE
- Publication number 20190334533
- Publication date Oct 31, 2019
- Intel Corporation
- Elias Nassar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHOD AND APPARATUS TO UTILIZE A DIGITAL-TIME-CONVERSION (DTC) BAS...
- Publication number 20190011945
- Publication date Jan 10, 2019
- Intel Corporation
- Eyal FAYNEH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCALABLE INTERLEAVED DIGITAL-TO-TIME CONVERTER CIRCUIT FOR CLOCK GE...
- Publication number 20180226985
- Publication date Aug 9, 2018
- Intel Corporation
- Rotem Banin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DYANAMICALLY ADAPTING A VOLTAGE OF A CLOCK GENERATION CIRCUIT
- Publication number 20160370839
- Publication date Dec 22, 2016
- Intel Corporation
- Tapan A. Ganpule
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYANAMICALLY ADAPTING A VOLTAGE OF A CLOCK GENERATION CIRCUIT
- Publication number 20150177824
- Publication date Jun 25, 2015
- Tapan A. Ganpule
- G06 - COMPUTING CALCULATING COUNTING

Inbar Falkov

Person

Patents Grantslast 30 patents

Divider-less fractional PLL architecture

Method and apparatus to utilize a digital-time-conversion (DTC) bas...

Scalable interleaved digital-to-time converter circuit for clock ge...

Dyanamically adapting a voltage of a clock generation circuit

Scalable interleaved digital-to-time converter circuit for clock ge...

Fast digital to time converter linearity calibration to improve clo...

Dyanamically adapting a voltage of a clock generation circuit

Patents Applicationslast 30 patents

DIVIDER-LESS FRACTIONAL PLL ARCHITECTURE

METHOD AND APPARATUS TO UTILIZE A DIGITAL-TIME-CONVERSION (DTC) BAS...

SCALABLE INTERLEAVED DIGITAL-TO-TIME CONVERTER CIRCUIT FOR CLOCK GE...

DYANAMICALLY ADAPTING A VOLTAGE OF A CLOCK GENERATION CIRCUIT

DYANAMICALLY ADAPTING A VOLTAGE OF A CLOCK GENERATION CIRCUIT