Innocenzo Tortorelli

Person

Cernusco Sul Naviglio, IT

People

Patents Grantslast 30 patents

Information Patent Grant
Programming techniques for polarity-based memory cells
- Patent number 12,293,789
- Issue date May 6, 2025
- Micron Technology, Inc.
- Innocenzo Tortorelli
- G11 - INFORMATION STORAGE
Information Patent Grant
Asymmetric memory cell design
- Patent number 12,295,147
- Issue date May 6, 2025
- Micron Technology, Inc.
- Mattia Robustelli
Information Patent Grant
Cross-point pillar architecture for memory arrays
- Patent number 12,283,316
- Issue date Apr 22, 2025
- Micron Technology, Inc.
- Innocenzo Tortorelli
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device and method for operating the same including setting a...
- Patent number 12,277,967
- Issue date Apr 15, 2025
- Micron Technology, Inc.
- Marco Sforzin
- G11 - INFORMATION STORAGE
Information Patent Grant
Techniques for forming self-aligned memory structures
- Patent number 12,219,883
- Issue date Feb 4, 2025
- Micron Technology, Inc.
- Stephen W. Russell
Information Patent Grant
Operating a chalcogenide memory with vertical word and vertical wor...
- Patent number 12,176,042
- Issue date Dec 24, 2024
- Micron Technology, Inc.
- Agostino Pirovano
- G11 - INFORMATION STORAGE
Information Patent Grant
Write latency and energy using asymmetric cell design
- Patent number 12,125,540
- Issue date Oct 22, 2024
- Micron Technology, Inc.
- Mattia Robustelli
- G11 - INFORMATION STORAGE
Information Patent Grant
Analog storage using memory device
- Patent number 12,080,365
- Issue date Sep 3, 2024
- Micron Technology, Inc.
- Mattia Boniardi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Random number generation based on threshold voltage randomness
- Patent number 12,075,714
- Issue date Aug 27, 2024
- Micron Technology, Inc.
- Innocenzo Tortorelli
- G11 - INFORMATION STORAGE
Information Patent Grant
Techniques for multi-level chalcogenide memory cell programming
- Patent number 12,033,695
- Issue date Jul 9, 2024
- Micron Technology, Inc.
- Innocenzo Tortorelli
- G11 - INFORMATION STORAGE
Information Patent Grant
Programming techniques for polarity-based memory cells
- Patent number 12,014,779
- Issue date Jun 18, 2024
- Micron Technology, Inc.
- Innocenzo Tortorelli
- G11 - INFORMATION STORAGE
Information Patent Grant
Reading a multi-level memory cell
- Patent number 11,996,141
- Issue date May 28, 2024
- Micron Technology, Inc.
- Mattia Robustelli
- G11 - INFORMATION STORAGE
Information Patent Grant
Pulse based multi-level cell programming
- Patent number 11,984,191
- Issue date May 14, 2024
- Micron Technology, Inc.
- Hernan A. Castro
- G11 - INFORMATION STORAGE
Information Patent Grant
Adaptive write operations for a memory device
- Patent number 11,942,183
- Issue date Mar 26, 2024
- Micron Technology, Inc.
- Mattia Boniardi
- G11 - INFORMATION STORAGE
Information Patent Grant
Varying-polarity read operations for polarity-written memory cells
- Patent number 11,923,002
- Issue date Mar 5, 2024
- Micron Technology, Inc.
- Innocenzo Tortorelli
- G11 - INFORMATION STORAGE
Information Patent Grant
Neural network memory
- Patent number 11,922,056
- Issue date Mar 5, 2024
- Micron Technology, Inc.
- Mattia Boniardi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device and method for operating the same
- Patent number 11,915,750
- Issue date Feb 27, 2024
- Micron Technology, Inc.
- Marco Sforzin
- G11 - INFORMATION STORAGE
Information Patent Grant
Cross-point pillar architecture for memory arrays
- Patent number 11,887,661
- Issue date Jan 30, 2024
- Micron Technology, Inc.
- Innocenzo Tortorelli
- G11 - INFORMATION STORAGE
Information Patent Grant
Segregation-based memory
- Patent number 11,869,585
- Issue date Jan 9, 2024
- Micron Technology, Inc.
- Mattia Boniardi
- G11 - INFORMATION STORAGE
Information Patent Grant
Implementations to store fuse data in memory devices
- Patent number 11,837,267
- Issue date Dec 5, 2023
- Micron Technology, Inc.
- Mattia Boniardi
- G11 - INFORMATION STORAGE
Information Patent Grant
Techniques for programming a memory cell
- Patent number 11,817,148
- Issue date Nov 14, 2023
- Micron Technology, Inc.
- Hernan A. Castro
- G11 - INFORMATION STORAGE
Information Patent Grant
Dopant-modulated etching for memory devices
- Patent number 11,800,816
- Issue date Oct 24, 2023
- Micron Technology, Inc.
- Innocenzo Tortorelli
Information Patent Grant
Apparatuses including multi-level memory cells and methods of opera...
- Patent number 11,798,620
- Issue date Oct 24, 2023
- Micron Technology, Inc.
- Innocenzo Tortorelli
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory cells for storing operational data
- Patent number 11,783,897
- Issue date Oct 10, 2023
- Micron Technology, Inc.
- Mattia Boniardi
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-level self-selecting memory device
- Patent number 11,769,551
- Issue date Sep 26, 2023
- Micron Technology, Inc.
- Andrea Redaelli
- G11 - INFORMATION STORAGE
Information Patent Grant
Three dimensional memory arrays
- Patent number 11,765,912
- Issue date Sep 19, 2023
- Micron Technology, Inc.
- Agostino Pirovano
Information Patent Grant
Techniques to access a self-selecting memory device
- Patent number 11,763,886
- Issue date Sep 19, 2023
- Micron Technology, Inc.
- Innocenzo Tortorelli
- G11 - INFORMATION STORAGE
Information Patent Grant
Programming techniques for polarity-based memory cells
- Patent number 11,735,276
- Issue date Aug 22, 2023
- Micron Technology, Inc.
- Alessandro Sebastiani
- G11 - INFORMATION STORAGE
Information Patent Grant
Programming enhancement in self-selecting memory
- Patent number 11,735,261
- Issue date Aug 22, 2023
- Micron Technology, Inc.
- Andrea Redaelli
- G11 - INFORMATION STORAGE
Information Patent Grant
Capacitive pillar architecture for a memory array
- Patent number 11,729,999
- Issue date Aug 15, 2023
- Micron Technology, Inc.
- Innocenzo Tortorelli
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
WRITE LATENCY AND ENERGY USING ASYMMETRIC CELL DESIGN
- Publication number 20250118372
- Publication date Apr 10, 2025
- Micron Technology, Inc.
- Mattia Robustelli
- G11 - INFORMATION STORAGE
Information Patent Application
RANDOM NUMBER GENERATION BASED ON THRESHOLD VOLTAGE RANDOMNESS
- Publication number 20250024761
- Publication date Jan 16, 2025
- Micron Technology, Inc.
- Innocenzo Tortorelli
- G11 - INFORMATION STORAGE
Information Patent Application
REFERENCING MEMORY USING PORTIONS OF A SPLIT LOGICAL BLOCK ADDRESS
- Publication number 20240427699
- Publication date Dec 26, 2024
- Micron Technology, Inc.
- Mattia Robustelli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ANALOG STORAGE USING MEMORY DEVICE
- Publication number 20240420786
- Publication date Dec 19, 2024
- Micron Technology, Inc.
- Mattia Boniardi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR MULTI-LEVEL MEMORY CELL PROGRAMMING
- Publication number 20240404590
- Publication date Dec 5, 2024
- Micron Technology, Inc.
- Innocenzo Tortorelli
- G11 - INFORMATION STORAGE
Information Patent Application
PROGRAMMING TECHNIQUES FOR POLARITY-BASED MEMORY CELLS
- Publication number 20240386963
- Publication date Nov 21, 2024
- Micron Technology, Inc.
- Innocenzo Tortorelli
- G11 - INFORMATION STORAGE
Information Patent Application
PULSE BASED MULTI-LEVEL CELL PROGRAMMING
- Publication number 20240347081
- Publication date Oct 17, 2024
- Micron Technology, Inc.
- Hernan A. Castro
- G11 - INFORMATION STORAGE
Information Patent Application
READING A MULTI-LEVEL MEMORY CELL
- Publication number 20240321347
- Publication date Sep 26, 2024
- Micron Technology, Inc.
- Mattia Robustelli
- G11 - INFORMATION STORAGE
Information Patent Application
VARYING-POLARITY READ OPERATIONS FOR POLARITY-WRITTEN MEMORY CELLS
- Publication number 20240312518
- Publication date Sep 19, 2024
- Micron Technology, Inc.
- Innocenzo Tortorelli
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUS WITH MULTI-BIT CELL READ MECHANISM AND METHODS FOR OPERAT...
- Publication number 20240233828
- Publication date Jul 11, 2024
- Micron Technology, Inc.
- Matteo Impala'
- G11 - INFORMATION STORAGE
Information Patent Application
CROSS-POINT PILLAR ARCHITECTURE FOR MEMORY ARRAYS
- Publication number 20240221829
- Publication date Jul 4, 2024
- Micron Technology, Inc.
- Innocenzo Tortorelli
- G11 - INFORMATION STORAGE
Information Patent Application
ADAPTIVE WRITE OPERATIONS FOR A MEMORY DEVICE
- Publication number 20240203468
- Publication date Jun 20, 2024
- Micron Technology, Inc.
- Mattia Boniardi
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE AND METHOD FOR OPERATING THE SAME
- Publication number 20240194258
- Publication date Jun 13, 2024
- Micron Technology, Inc.
- Marco Sforzin
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUS WITH MULTI-BIT CELL READ MECHANISM AND METHODS FOR OPERAT...
- Publication number 20240135996
- Publication date Apr 25, 2024
- Micron Technology, Inc.
- Matteo Impala'
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY AND STORAGE ON A SINGLE CHIP
- Publication number 20240130143
- Publication date Apr 18, 2024
- Micron Technology, Inc.
- Innocenzo Tortorelli
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RANDOM NUMBER GENERATION BASED ON THRESHOLD VOLTAGE RANDOMNESS
- Publication number 20240057489
- Publication date Feb 15, 2024
- Micron Technology, Inc.
- Innocenzo Tortorelli
- G11 - INFORMATION STORAGE
Information Patent Application
DOPANT-MODULATED ETCHING FOR MEMORY DEVICES
- Publication number 20240049610
- Publication date Feb 8, 2024
- Micron Technology, Inc.
- Innocenzo Tortorelli
Information Patent Application
UNIPOLAR PROGRAMMING OF MEMORY CELLS
- Publication number 20240029796
- Publication date Jan 25, 2024
- Micron Technology, Inc.
- Innocenzo Tortorelli
- G11 - INFORMATION STORAGE
Information Patent Application
TIMING FOR OPERATIONS IN MEMORY DEVICE STORING BITS IN MEMORY CELL...
- Publication number 20230395135
- Publication date Dec 7, 2023
- Micron Technology, Inc.
- Ferdinando Bedeschi
- G11 - INFORMATION STORAGE
Information Patent Application
WORDLINE BOOST BY CHARGE SHARING IN A MEMORY DEVICE
- Publication number 20230386572
- Publication date Nov 30, 2023
- Micron Technology, Inc.
- Mattia Robustelli
- G11 - INFORMATION STORAGE
Information Patent Application
TECHNIQUES FOR MULTI-LEVEL MEMORY CELL PROGRAMMING
- Publication number 20230360699
- Publication date Nov 9, 2023
- Micron Technology, Inc.
- Innocenzo Tortorelli
- G11 - INFORMATION STORAGE
Information Patent Application
PULSE BASED MULTI-LEVEL CELL PROGRAMMING
- Publication number 20230360681
- Publication date Nov 9, 2023
- Micron Technology, Inc.
- Hernan A. Castro
- G11 - INFORMATION STORAGE
Information Patent Application
ASYMMETRIC MEMORY CELL DESIGN
- Publication number 20230354619
- Publication date Nov 2, 2023
- Micron Technology, Inc.
- Mattia Robustelli
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
WRITE LATENCY AND ENERGY USING ASYMMETRIC CELL DESIGN
- Publication number 20230352095
- Publication date Nov 2, 2023
- Micron Technology, Inc.
- Mattia Robustelli
- G11 - INFORMATION STORAGE
Information Patent Application
TECHNIQUES FOR OPERATING A VERTICAL MEMORY ARCHITECTURE
- Publication number 20230260581
- Publication date Aug 17, 2023
- Micron Technology, Inc.
- Agostino Pirovano
- G11 - INFORMATION STORAGE
Information Patent Application
CROSS-POINT PILLAR ARCHITECTURE FOR MEMORY ARRAYS
- Publication number 20230207002
- Publication date Jun 29, 2023
- Micron Technology, Inc.
- Innocenzo Tortorelli
- G11 - INFORMATION STORAGE
Information Patent Application
ANALOG STORAGE USING MEMORY DEVICE
- Publication number 20230114966
- Publication date Apr 13, 2023
- Micron Technology, Inc.
- Mattia Boniardi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NEURAL NETWORK MEMORY
- Publication number 20230058092
- Publication date Feb 23, 2023
- Micron Technology, Inc.
- Mattia Boniardi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DEVICES INCLUDING A PASSIVE MATERIAL BETWEEN MEMORY CELLS AND CONDU...
- Publication number 20230029529
- Publication date Feb 2, 2023
- Micron Technology, Inc.
- Innocenzo Tortorelli
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PROGRAMMING TECHNIQUES FOR POLARITY-BASED MEMORY CELLS
- Publication number 20230034787
- Publication date Feb 2, 2023
- Micron Technology, Inc.
- Innocenzo Tortorelli
- G11 - INFORMATION STORAGE

Innocenzo Tortorelli

Person

Patents Grantslast 30 patents

Programming techniques for polarity-based memory cells

Asymmetric memory cell design

Cross-point pillar architecture for memory arrays

Memory device and method for operating the same including setting a...

Techniques for forming self-aligned memory structures

Operating a chalcogenide memory with vertical word and vertical wor...

Write latency and energy using asymmetric cell design

Analog storage using memory device

Random number generation based on threshold voltage randomness

Techniques for multi-level chalcogenide memory cell programming

Programming techniques for polarity-based memory cells

Reading a multi-level memory cell

Pulse based multi-level cell programming

Adaptive write operations for a memory device

Varying-polarity read operations for polarity-written memory cells

Neural network memory

Memory device and method for operating the same

Cross-point pillar architecture for memory arrays

Segregation-based memory

Implementations to store fuse data in memory devices

Techniques for programming a memory cell

Dopant-modulated etching for memory devices

Apparatuses including multi-level memory cells and methods of opera...

Memory cells for storing operational data

Multi-level self-selecting memory device

Three dimensional memory arrays

Techniques to access a self-selecting memory device

Programming techniques for polarity-based memory cells

Programming enhancement in self-selecting memory

Capacitive pillar architecture for a memory array

Patents Applicationslast 30 patents

WRITE LATENCY AND ENERGY USING ASYMMETRIC CELL DESIGN

RANDOM NUMBER GENERATION BASED ON THRESHOLD VOLTAGE RANDOMNESS

REFERENCING MEMORY USING PORTIONS OF A SPLIT LOGICAL BLOCK ADDRESS

ANALOG STORAGE USING MEMORY DEVICE

TECHNIQUES FOR MULTI-LEVEL MEMORY CELL PROGRAMMING

PROGRAMMING TECHNIQUES FOR POLARITY-BASED MEMORY CELLS

PULSE BASED MULTI-LEVEL CELL PROGRAMMING

READING A MULTI-LEVEL MEMORY CELL

VARYING-POLARITY READ OPERATIONS FOR POLARITY-WRITTEN MEMORY CELLS

APPARATUS WITH MULTI-BIT CELL READ MECHANISM AND METHODS FOR OPERAT...

CROSS-POINT PILLAR ARCHITECTURE FOR MEMORY ARRAYS

ADAPTIVE WRITE OPERATIONS FOR A MEMORY DEVICE

MEMORY DEVICE AND METHOD FOR OPERATING THE SAME

APPARATUS WITH MULTI-BIT CELL READ MECHANISM AND METHODS FOR OPERAT...

MEMORY AND STORAGE ON A SINGLE CHIP

RANDOM NUMBER GENERATION BASED ON THRESHOLD VOLTAGE RANDOMNESS

DOPANT-MODULATED ETCHING FOR MEMORY DEVICES

UNIPOLAR PROGRAMMING OF MEMORY CELLS

TIMING FOR OPERATIONS IN MEMORY DEVICE STORING BITS IN MEMORY CELL...

WORDLINE BOOST BY CHARGE SHARING IN A MEMORY DEVICE

TECHNIQUES FOR MULTI-LEVEL MEMORY CELL PROGRAMMING

PULSE BASED MULTI-LEVEL CELL PROGRAMMING

ASYMMETRIC MEMORY CELL DESIGN

WRITE LATENCY AND ENERGY USING ASYMMETRIC CELL DESIGN

TECHNIQUES FOR OPERATING A VERTICAL MEMORY ARCHITECTURE

CROSS-POINT PILLAR ARCHITECTURE FOR MEMORY ARRAYS

ANALOG STORAGE USING MEMORY DEVICE

NEURAL NETWORK MEMORY

DEVICES INCLUDING A PASSIVE MATERIAL BETWEEN MEMORY CELLS AND CONDU...

PROGRAMMING TECHNIQUES FOR POLARITY-BASED MEMORY CELLS