Ioannis Savidis

Person

Wallingford, PA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Reducing logic locking key leakage through the scan chain
- Patent number 11,971,987
- Issue date Apr 30, 2024
- Drexel University
- Kyle Joseph Juretus
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Charge recycling from idle circuits for improved energy efficiency...
- Patent number 11,641,200
- Issue date May 2, 2023
- Drexel University
- Md Shazzad Hossain
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Physical layer key based interleaving for secure wireless communica...
- Patent number 11,540,120
- Issue date Dec 27, 2022
- Drexel University
- Kapil R. Dandekar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
On-chip power supply noise suppression through hyperabrupt junction...
- Patent number 11,444,210
- Issue date Sep 13, 2022
- Drexel University
- Divya Pathak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Work load scheduling for multi core systems with under-provisioned...
- Patent number 11,435,802
- Issue date Sep 6, 2022
- Drexel University
- Ioannis Savidis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reduced overhead gate level logic encryption
- Patent number 11,282,414
- Issue date Mar 22, 2022
- Drexel University
- Ioannis Savidis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Securing analog mixed-signal integrated circuits through shared dep...
- Patent number 11,270,031
- Issue date Mar 8, 2022
- Drexel University
- Ioannis Savidis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Physical gate based preamble obfuscation for securing wireless comm...
- Patent number 11,177,902
- Issue date Nov 16, 2021
- Drexel University
- James J. Chacko
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Transistor sizing for parameter obfuscation of analog circuits
- Patent number 11,157,674
- Issue date Oct 26, 2021
- Drexel University
- Vaibhav Venugopal Rao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Protecting analog circuits with parameter biasing obfuscation
- Patent number 10,923,442
- Issue date Feb 16, 2021
- Drexel University
- Ioannis Savidis
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Power supply voltage detection and power delivery circuit
- Patent number 9,912,325
- Issue date Mar 6, 2018
- Drexel University
- Ioannis Savidis
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
Physical Layer Key based Interleaving for Secure Wireless Communica...
- Publication number 20240214803
- Publication date Jun 27, 2024
- Drexel University
- Kapil R. Dandekar
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
RECONFIGURABLE ARRAY FOR ANALOG APPLICATIONS
- Publication number 20230344431
- Publication date Oct 26, 2023
- Drexel University
- Ioannis Savidis
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
RECONFIGURABLE ARRAY FOR ANALOG APPLICATIONS
- Publication number 20230299775
- Publication date Sep 21, 2023
- Drexel University
- Ioannis Savidis
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
VARIATION-AWARE ANALOG CIRCUIT SIZING WITH CLASSIFIER CHAINS
- Publication number 20230297750
- Publication date Sep 21, 2023
- Drexel University
- Zhengfeng Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REDUCING LOGIC LOCKING KEY LEAKAGE THROUGH THE SCAN CHAIN
- Publication number 20230090772
- Publication date Mar 23, 2023
- Drexel University
- Kyle Joseph Juretus
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CHARGE RECYCLING FROM IDLE CIRCUITS FOR IMPROVED ENERGY EFFICIENCY...
- Publication number 20210359675
- Publication date Nov 18, 2021
- Drexel University
- MD Shazzad Hossain
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ON-CHIP VOLTAGE ASSIGNMENT THROUGH PARTICLE SWARM OPTIMIZATION
- Publication number 20210247839
- Publication date Aug 12, 2021
- Drexel University
- Divya Pathak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Enhanced circuity security through hidden state transitions
- Publication number 20210019449
- Publication date Jan 21, 2021
- Drexel University
- Kyle Joseph Juretus
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SECURING ANALOG MIXED-SIGNAL INTEGRATED CIRCUITS THROUGH SHARED DEP...
- Publication number 20200342142
- Publication date Oct 29, 2020
- Drexel University
- Ioannis Savidis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRANSISTOR SIZING FOR PARAMETER OBFUSCATION OF ANALOG CIRCUITS
- Publication number 20200250365
- Publication date Aug 6, 2020
- Drexel University
- Vaibhav Venugopal Rao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ON-CHIP POWER SUPPLY NOISE SUPPRESSION THROUGH HYPERABRUPT JUNCTION...
- Publication number 20190393360
- Publication date Dec 26, 2019
- Drexel University
- Divya Pathak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Physical Gate based Preamble Obfuscation for Securing Wireless Comm...
- Publication number 20190373463
- Publication date Dec 5, 2019
- Drexel University
- James J. Chacko
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Physical Layer Key based Interleaving for Secure Wireless Communica...
- Publication number 20190373458
- Publication date Dec 5, 2019
- Drexel University
- Kapil R. Dandekar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Reduced Overhead Gate Level Logic Encryption
- Publication number 20180315351
- Publication date Nov 1, 2018
- Drexel University
- Ioannis Savidis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Work Load Scheduling For Multi Core Systems With Under-Provisioned...
- Publication number 20180314308
- Publication date Nov 1, 2018
- Drexel University
- Ioannis Savidis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Protecting Analog Circuits with Parameter Biasing Obfuscation
- Publication number 20180301426
- Publication date Oct 18, 2018
- Drexel University
- Ioannis Savidis
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
POWER SUPPLY VOLTAGE DETECTION AND POWER DELIVERY CIRCUIT
- Publication number 20160301400
- Publication date Oct 13, 2016
- Drexel University
- Ioannis Savidis
- H03 - BASIC ELECTRONIC CIRCUITRY

Ioannis Savidis

Person

Patents Grantslast 30 patents

Reducing logic locking key leakage through the scan chain

Charge recycling from idle circuits for improved energy efficiency...

Physical layer key based interleaving for secure wireless communica...

On-chip power supply noise suppression through hyperabrupt junction...

Work load scheduling for multi core systems with under-provisioned...

Reduced overhead gate level logic encryption

Securing analog mixed-signal integrated circuits through shared dep...

Physical gate based preamble obfuscation for securing wireless comm...

Transistor sizing for parameter obfuscation of analog circuits

Protecting analog circuits with parameter biasing obfuscation

Power supply voltage detection and power delivery circuit

Patents Applicationslast 30 patents

Physical Layer Key based Interleaving for Secure Wireless Communica...

RECONFIGURABLE ARRAY FOR ANALOG APPLICATIONS

RECONFIGURABLE ARRAY FOR ANALOG APPLICATIONS

VARIATION-AWARE ANALOG CIRCUIT SIZING WITH CLASSIFIER CHAINS

REDUCING LOGIC LOCKING KEY LEAKAGE THROUGH THE SCAN CHAIN

CHARGE RECYCLING FROM IDLE CIRCUITS FOR IMPROVED ENERGY EFFICIENCY...

ON-CHIP VOLTAGE ASSIGNMENT THROUGH PARTICLE SWARM OPTIMIZATION

Enhanced circuity security through hidden state transitions

SECURING ANALOG MIXED-SIGNAL INTEGRATED CIRCUITS THROUGH SHARED DEP...

TRANSISTOR SIZING FOR PARAMETER OBFUSCATION OF ANALOG CIRCUITS

ON-CHIP POWER SUPPLY NOISE SUPPRESSION THROUGH HYPERABRUPT JUNCTION...

Physical Gate based Preamble Obfuscation for Securing Wireless Comm...

Physical Layer Key based Interleaving for Secure Wireless Communica...

Reduced Overhead Gate Level Logic Encryption

Work Load Scheduling For Multi Core Systems With Under-Provisioned...

Protecting Analog Circuits with Parameter Biasing Obfuscation

POWER SUPPLY VOLTAGE DETECTION AND POWER DELIVERY CIRCUIT