Isaac Lauer

Person

Yorktown Heights, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Pulsed stark tones for collision mitigation
- Patent number 12,147,300
- Issue date Nov 19, 2024
- International Business Machines Corporation
- Isaac Lauer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Superconducting circuit provided on an encapsulated vacuum cavity
- Patent number 12,041,856
- Issue date Jul 16, 2024
- International Business Machines Corporation
- Isaac Lauer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Pulsed stark tones for collision mitigation
- Patent number 11,789,812
- Issue date Oct 17, 2023
- International Business Machines Corporation
- Isaac Lauer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Heavy-hex connection topology to rectilinear physical layout
- Patent number 11,751,491
- Issue date Sep 5, 2023
- International Business Machines Corporation
- Isaac Lauer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Target qubit decoupling in an echoed cross-resonance gate
- Patent number 11,695,483
- Issue date Jul 4, 2023
- International Business Machines Corporation
- Isaac Lauer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Vacuum encapsulated Josephson junction
- Patent number 11,678,591
- Issue date Jun 13, 2023
- International Business Machines Corporation
- Isaac Lauer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Drive enhanced J/ZZ operation for superconducting qubits
- Patent number 11,625,638
- Issue date Apr 11, 2023
- International Business Machines Corporation
- Abhinav Kandala
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Qubit reset from excited states
- Patent number 11,586,448
- Issue date Feb 21, 2023
- International Business Machines Corporation
- Isaac Lauer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Qubit pulse calibration via canary parameter monitoring
- Patent number 11,526,796
- Issue date Dec 13, 2022
- International Business Machines Corporation
- Isaac Lauer
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Embedded microstrip transmission line
- Patent number 11,469,485
- Issue date Oct 11, 2022
- International Business Machines Corporation
- Isaac Lauer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
All microwave ZZ control
- Patent number 11,223,347
- Issue date Jan 11, 2022
- International Business Machines Corporation
- David C. Mckay
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Sacrificial layer for channel surface retention and inner spacer fo...
- Patent number 11,069,775
- Issue date Jul 20, 2021
- International Business Machines Corporation
- Josephine B. Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Atomic layer deposition sealing integration for nanosheet complemen...
- Patent number 11,004,678
- Issue date May 11, 2021
- International Business Machines Corporation
- Bruce B. Doris
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Field effect transistor structures
- Patent number 11,004,933
- Issue date May 11, 2021
- Tessera, Inc.
- Josephine B. Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Techniques for creating a local interconnect using a SOI wafer
- Patent number 10,699,955
- Issue date Jun 30, 2020
- ELPIS TECHNOLOGIES INC.
- Josephine B. Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Sacrificial layer for channel surface retention and inner spacer fo...
- Patent number 10,680,061
- Issue date Jun 9, 2020
- International Business Machines Corporation
- Josephine B. Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Nanowire with sacrificial top wire
- Patent number 10,658,461
- Issue date May 19, 2020
- Tessera, Inc.
- Josephine B. Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Strained semiconductor nanowire
- Patent number 10,580,894
- Issue date Mar 3, 2020
- International Business Machines Corporation
- Josephine B. Chang
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Sacrificial layer for channel surface retention and inner spacer fo...
- Patent number 10,573,714
- Issue date Feb 25, 2020
- International Business Machines Corporation
- Josephine B. Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Atomic layer deposition sealing integration for nanosheet complemen...
- Patent number 10,522,342
- Issue date Dec 31, 2019
- International Business Machines Corporation
- Bruce B. Doris
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Atomic layer deposition sealing integration for nanosheet complemen...
- Patent number 10,395,922
- Issue date Aug 27, 2019
- International Business Machines Corporation
- Bruce B. Doris
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Hybrid III-V technology to support multiple supply voltages and off...
- Patent number 10,366,892
- Issue date Jul 30, 2019
- International Business Machines Corporation
- Josephine B. Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Co-integration of silicon and silicon-germanium channels for nanosh...
- Patent number 10,367,062
- Issue date Jul 30, 2019
- International Business Machines Corporation
- Michael A. Guillorn
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fabrication of a strained region on a substrate
- Patent number 10,361,304
- Issue date Jul 23, 2019
- International Business Machines Corporation
- Isaac Lauer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Implementing a hybrid finFET device and nanowire device utilizing s...
- Patent number 10,361,219
- Issue date Jul 23, 2019
- International Business Machines Corporation
- Josephine B. Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Support for long channel length nanowire transistors
- Patent number 10,354,960
- Issue date Jul 16, 2019
- International Business Machines Corporation
- Karthik Balakrishnan
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Sacrificial layer for channel surface retention and inner spacer fo...
- Patent number 10,325,983
- Issue date Jun 18, 2019
- International Business Machines Corporation
- Josephine B. Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Sacrificial layer for channel surface retention and inner spacer fo...
- Patent number 10,217,817
- Issue date Feb 26, 2019
- International Business Machines Corporation
- Josephine B. Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Internal spacer formation from selective oxidation for fin-first wi...
- Patent number 10,170,608
- Issue date Jan 1, 2019
- International Business Machines Corporation
- Szu-Lin Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Internal spacer formation from selective oxidation for Fin-first wi...
- Patent number 10,170,609
- Issue date Jan 1, 2019
- International Business Machines Corporation
- Szu-Lin Cheng
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
TARGET QUBIT DECOUPLING IN AN ECHOED CROSS-RESONANCE GATE
- Publication number 20240235698
- Publication date Jul 11, 2024
- International Business Machines Corporation
- Isaac Lauer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PULSED STARK TONES FOR COLLISION MITIGATION
- Publication number 20230418706
- Publication date Dec 28, 2023
- International Business Machines Corporation
- Isaac Lauer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PULSED STARK TONES FOR COLLISION MITIGATION
- Publication number 20230153199
- Publication date May 18, 2023
- International Business Machines Corporation
- Isaac Lauer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EMBEDDED MICROSTRIP TRANSMISSION LINE
- Publication number 20220416392
- Publication date Dec 29, 2022
- International Business Machines Corporation
- Isaac Lauer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DRIVE ENHANCED J/ZZ OPERATION FOR SUPERCONDUCTING QUBITS
- Publication number 20220383169
- Publication date Dec 1, 2022
- International Business Machines Corporation
- Abhinav Kandala
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EMBEDDED MICROSTRIP TRANSMISSION LINE
- Publication number 20220123449
- Publication date Apr 21, 2022
- International Business Machines Corporation
- Isaac Lauer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SUPERCONDUCTING CIRCUIT PROVIDED ON AN ENCAPSULATED VACUUM CAVITY
- Publication number 20220102613
- Publication date Mar 31, 2022
- International Business Machines Corporation
- Isaac Lauer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VACUUM ENCAPSULATED JOSEPHSON JUNCTION
- Publication number 20220102612
- Publication date Mar 31, 2022
- International Business Machines Corporation
- Isaac Lauer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GRAPHENE/NANOSTRUCTURE FET WITH SELF-ALIGNED CONTACT AND GATE
- Publication number 20220093772
- Publication date Mar 24, 2022
- International Business Machines Corporation
- Josephine Chang
- B82 - NANO-TECHNOLOGY
Information Patent Application
HEAVY-HEX CONNECTION TOPOLOGY TO RECTILINEAR PHYSICAL LAYOUT
- Publication number 20220028927
- Publication date Jan 27, 2022
- International Business Machines Corporation
- Isaac Lauer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
QUBIT PULSE CALIBRATION VIA CANARY PARAMETER MONITORING
- Publication number 20220019927
- Publication date Jan 20, 2022
- International Business Machines Corporation
- Isaac Lauer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
QUBIT RESET FROM EXCITED STATES
- Publication number 20210342161
- Publication date Nov 4, 2021
- International Business Machines Corporation
- Isaac Lauer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FIELD EFFECT TRANSISTOR STRUCTURES
- Publication number 20210280674
- Publication date Sep 9, 2021
- Tessera, Inc.
- Josephine B. Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TARGET QUBIT DECOUPLING IN AN ECHOED CROSS-RESONANCE GATE
- Publication number 20210258079
- Publication date Aug 19, 2021
- International Business Machines Corporation
- Isaac Lauer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SACRIFICIAL LAYER FOR CHANNEL SURFACE RETENTION AND INNER SPACER FO...
- Publication number 20200091289
- Publication date Mar 19, 2020
- International Business Machines Corporation
- Josephine B. Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ATOMIC LAYER DEPOSITION SEALING INTEGRATION FOR NANOSHEET COMPLEMEN...
- Publication number 20200066508
- Publication date Feb 27, 2020
- International Business Machines Corporation
- Bruce B. Doris
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
IMPLEMENTING A HYBRID FINFET DEVICE AND NANOWIRE DEVICE UTILIZING S...
- Publication number 20190288012
- Publication date Sep 19, 2019
- International Business Machines Corporation
- Josephine B. Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SACRIFICIAL LAYER FOR CHANNEL SURFACE RETENTION AND INNER SPACER FO...
- Publication number 20190237541
- Publication date Aug 1, 2019
- International Business Machines Corporation
- Josephine B. Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SACRIFICIAL LAYER FOR CHANNEL SURFACE RETENTION AND INNER SPACER FO...
- Publication number 20180366544
- Publication date Dec 20, 2018
- International Business Machines Corporation
- Josephine B. Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NANOWIRE WITH SACRIFICIAL TOP WIRE
- Publication number 20180350909
- Publication date Dec 6, 2018
- International Business Machines Corporation
- Josephine B. Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Techniques for Creating a Local Interconnect Using a SOI Wafer
- Publication number 20180330989
- Publication date Nov 15, 2018
- International Business Machines Corporation
- Josephine B. Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NANOWIRE WITH SACRIFICIAL TOP WIRE
- Publication number 20180331180
- Publication date Nov 15, 2018
- International Business Machines Corporation
- Josephine B. Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FABRICATION OF A STRAINED REGION ON A SUBSTRATE
- Publication number 20180308976
- Publication date Oct 25, 2018
- International Business Machines Corporation
- Isaac Lauer
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
ATOMIC LAYER DEPOSITION SEALING INTEGRATION FOR NANOSHEET COMPLEMEN...
- Publication number 20180294151
- Publication date Oct 11, 2018
- International Business Machines Corporation
- Bruce B. Doris
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CO-INTEGRATION OF SILICON AND SILICON-GERMANIUM CHANNELS FOR NANOSH...
- Publication number 20180277626
- Publication date Sep 27, 2018
- International Business Machines Corporation
- Michael A. Guillorn
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRAINED SEMICONDUCTOR NANOWIRE
- Publication number 20180254345
- Publication date Sep 6, 2018
- International Business Machines Corporation
- Josephine B. Chang
- B82 - NANO-TECHNOLOGY
Information Patent Application
Hybrid III-V Technology to Support Multiple Supply Voltages and Off...
- Publication number 20180174844
- Publication date Jun 21, 2018
- International Business Machines Corporation
- Josephine B. Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ATOMIC LAYER DEPOSITION SEALING INTEGRATION FOR NANOSHEET COMPLEMEN...
- Publication number 20180096835
- Publication date Apr 5, 2018
- International Business Machines Corporation
- Bruce B. Doris
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FABRICATION OF A STRAINED REGION ON A SUBSTRATE
- Publication number 20180040730
- Publication date Feb 8, 2018
- International Business Machines Corporation
- Isaac Lauer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THROUGH-SILICON VIA WITH INSULATOR FILL
- Publication number 20180005954
- Publication date Jan 4, 2018
- International Business Machines Corporation
- DAVID W. ABRAHAM
- H01 - BASIC ELECTRIC ELEMENTS

Isaac Lauer

Person

Patents Grantslast 30 patents

Pulsed stark tones for collision mitigation

Superconducting circuit provided on an encapsulated vacuum cavity

Pulsed stark tones for collision mitigation

Heavy-hex connection topology to rectilinear physical layout

Target qubit decoupling in an echoed cross-resonance gate

Vacuum encapsulated Josephson junction

Drive enhanced J/ZZ operation for superconducting qubits

Qubit reset from excited states

Qubit pulse calibration via canary parameter monitoring

Embedded microstrip transmission line

All microwave ZZ control

Sacrificial layer for channel surface retention and inner spacer fo...

Atomic layer deposition sealing integration for nanosheet complemen...

Field effect transistor structures

Techniques for creating a local interconnect using a SOI wafer

Sacrificial layer for channel surface retention and inner spacer fo...

Nanowire with sacrificial top wire

Strained semiconductor nanowire

Sacrificial layer for channel surface retention and inner spacer fo...

Atomic layer deposition sealing integration for nanosheet complemen...

Atomic layer deposition sealing integration for nanosheet complemen...

Hybrid III-V technology to support multiple supply voltages and off...

Co-integration of silicon and silicon-germanium channels for nanosh...

Fabrication of a strained region on a substrate

Implementing a hybrid finFET device and nanowire device utilizing s...

Support for long channel length nanowire transistors

Sacrificial layer for channel surface retention and inner spacer fo...

Sacrificial layer for channel surface retention and inner spacer fo...

Internal spacer formation from selective oxidation for fin-first wi...

Internal spacer formation from selective oxidation for Fin-first wi...

Patents Applicationslast 30 patents

TARGET QUBIT DECOUPLING IN AN ECHOED CROSS-RESONANCE GATE

PULSED STARK TONES FOR COLLISION MITIGATION

PULSED STARK TONES FOR COLLISION MITIGATION

EMBEDDED MICROSTRIP TRANSMISSION LINE

DRIVE ENHANCED J/ZZ OPERATION FOR SUPERCONDUCTING QUBITS

EMBEDDED MICROSTRIP TRANSMISSION LINE

SUPERCONDUCTING CIRCUIT PROVIDED ON AN ENCAPSULATED VACUUM CAVITY

VACUUM ENCAPSULATED JOSEPHSON JUNCTION

GRAPHENE/NANOSTRUCTURE FET WITH SELF-ALIGNED CONTACT AND GATE

HEAVY-HEX CONNECTION TOPOLOGY TO RECTILINEAR PHYSICAL LAYOUT

QUBIT PULSE CALIBRATION VIA CANARY PARAMETER MONITORING

QUBIT RESET FROM EXCITED STATES

FIELD EFFECT TRANSISTOR STRUCTURES

TARGET QUBIT DECOUPLING IN AN ECHOED CROSS-RESONANCE GATE

SACRIFICIAL LAYER FOR CHANNEL SURFACE RETENTION AND INNER SPACER FO...

ATOMIC LAYER DEPOSITION SEALING INTEGRATION FOR NANOSHEET COMPLEMEN...

IMPLEMENTING A HYBRID FINFET DEVICE AND NANOWIRE DEVICE UTILIZING S...

SACRIFICIAL LAYER FOR CHANNEL SURFACE RETENTION AND INNER SPACER FO...

SACRIFICIAL LAYER FOR CHANNEL SURFACE RETENTION AND INNER SPACER FO...

NANOWIRE WITH SACRIFICIAL TOP WIRE

Techniques for Creating a Local Interconnect Using a SOI Wafer

NANOWIRE WITH SACRIFICIAL TOP WIRE

FABRICATION OF A STRAINED REGION ON A SUBSTRATE

ATOMIC LAYER DEPOSITION SEALING INTEGRATION FOR NANOSHEET COMPLEMEN...

CO-INTEGRATION OF SILICON AND SILICON-GERMANIUM CHANNELS FOR NANOSH...

STRAINED SEMICONDUCTOR NANOWIRE

Hybrid III-V Technology to Support Multiple Supply Voltages and Off...

ATOMIC LAYER DEPOSITION SEALING INTEGRATION FOR NANOSHEET COMPLEMEN...

FABRICATION OF A STRAINED REGION ON A SUBSTRATE

THROUGH-SILICON VIA WITH INSULATOR FILL