Ivan Matosevic

Person

Toronto, CA

People

Patents Grantslast 30 patents

Information Patent Grant
Overlay layer hardware unit for network of processor cores
- Patent number 12,210,478
- Issue date Jan 28, 2025
- Tenstorrent Inc.
- Ivan Matosevic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data structure optimized dedicated memory caches
- Patent number 12,019,546
- Issue date Jun 25, 2024
- Tenstorrent Inc.
- Ljubisa Bajic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Overlay layer hardware unit for network of processor cores
- Patent number 11,734,224
- Issue date Aug 22, 2023
- Tenstorrent Inc.
- Ivan Matosevic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data structure optimized dedicated memory caches
- Patent number 11,520,701
- Issue date Dec 6, 2022
- Tenstorrent Inc.
- Ljubisa Bajic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Overlay layer for network of processor cores
- Patent number 11,467,846
- Issue date Oct 11, 2022
- Tenstorrent Inc.
- Davor Capalija
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Speculative resource allocation for routing on interconnect fabrics
- Patent number 11,245,643
- Issue date Feb 8, 2022
- Tenstorrent Inc.
- Ivan Matosevic
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
OVERLAY LAYER HARDWARE UNIT FOR NETWORK OF PROCESSOR CORES
- Publication number 20230281155
- Publication date Sep 7, 2023
- Tenstorrent Inc.
- Ivan Matosevic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA STRUCTURE OPTIMIZED DEDICATED MEMORY CACHES
- Publication number 20230062891
- Publication date Mar 2, 2023
- Tenstorrent Inc.
- Ljubisa Bajic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OVERLAY LAYER FOR NETWORK OF PROCESSOR CORES
- Publication number 20230041130
- Publication date Feb 9, 2023
- Tenstorrent Inc.
- Davor Capalija
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GRAPH EXECUTION USING ACCESS REQUEST RESPONSE DYNAMIC BATCH ASSEMBLY
- Publication number 20220318614
- Publication date Oct 6, 2022
- Tenstorrent Inc.
- Ljubisa Bajic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA STRUCTURE OPTIMIZED DEDICATED MEMORY CACHES
- Publication number 20220318144
- Publication date Oct 6, 2022
- Tenstorrent Inc.
- Ljubisa Bajic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Overlay Layer Hardware Unit for Network of Processor Cores
- Publication number 20220100503
- Publication date Mar 31, 2022
- Tenstorrent Inc.
- Ivan Matosevic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SPECULATIVE RESOURCE ALLOCATION FOR ROUTING ON INTERCONNECT FABRICS
- Publication number 20210367905
- Publication date Nov 25, 2021
- Tenstorrent Inc.
- Ivan Matosevic
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
OVERLAY LAYER FOR NETWORK OF PROCESSOR CORES
- Publication number 20210034373
- Publication date Feb 4, 2021
- Tenstorrent Inc.
- Davor Capalija
- G06 - COMPUTING CALCULATING COUNTING

Ivan Matosevic

Person

Patents Grantslast 30 patents

Overlay layer hardware unit for network of processor cores

Data structure optimized dedicated memory caches

Overlay layer hardware unit for network of processor cores

Data structure optimized dedicated memory caches

Overlay layer for network of processor cores

Speculative resource allocation for routing on interconnect fabrics

Patents Applicationslast 30 patents

OVERLAY LAYER HARDWARE UNIT FOR NETWORK OF PROCESSOR CORES

DATA STRUCTURE OPTIMIZED DEDICATED MEMORY CACHES

OVERLAY LAYER FOR NETWORK OF PROCESSOR CORES

GRAPH EXECUTION USING ACCESS REQUEST RESPONSE DYNAMIC BATCH ASSEMBLY

DATA STRUCTURE OPTIMIZED DEDICATED MEMORY CACHES

Overlay Layer Hardware Unit for Network of Processor Cores

SPECULATIVE RESOURCE ALLOCATION FOR ROUTING ON INTERCONNECT FABRICS

OVERLAY LAYER FOR NETWORK OF PROCESSOR CORES