Jacklyn CHANG

Person

San Ramon, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor device
- Patent number 12,132,041
- Issue date Oct 29, 2024
- Taiwan Semiconductor Manufacturing Co., Ltd
- Jacklyn Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device
- Patent number 11,031,383
- Issue date Jun 8, 2021
- Taiwan Semiconductor Manufacturing Co., Ltd
- Jacklyn Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory circuit layout method
- Patent number 11,024,621
- Issue date Jun 1, 2021
- Taiwan Semiconductor Manufacturing Company, Ltd
- Jacklyn Chang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory circuit including tracking circuit
- Patent number 11,017,825
- Issue date May 25, 2021
- Taiwan Semiconductor Manufacturing Company, Ltd
- Kuoyuan (Peter) Hsu
- G11 - INFORMATION STORAGE
Information Patent Grant
Differential read-only memory (ROM) device
- Patent number 10,832,744
- Issue date Nov 10, 2020
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Kuoyuan Hsu
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory circuit having tracking circuit including series-connected t...
- Patent number 10,553,265
- Issue date Feb 4, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd
- Kuoyuan (Peter) Hsu
- G11 - INFORMATION STORAGE
Information Patent Grant
Differential read-only memory (ROM) device
- Patent number 10,490,235
- Issue date Nov 26, 2019
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Kuoyuan Hsu
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory circuit layout
- Patent number 10,490,544
- Issue date Nov 26, 2019
- Taiwan Semiconductor Manufacturing Company, Ltd
- Jacklyn Chang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of operating tracking circuit
- Patent number 10,163,476
- Issue date Dec 25, 2018
- TAIWAN SEMICONDUCTOR MANUFACTUING COMPANY, LTD.
- Kuoyuan (Peter) Hsu
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory circuit having tracking circuit including series-connected t...
- Patent number 9,934,833
- Issue date Apr 3, 2018
- Taiwan Semiconductor Manufacturing Company, Ltd
- Kuoyuan (Peter) Hsu
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory circuit, layout of memory circuit, and method of forming layout
- Patent number 9,887,186
- Issue date Feb 6, 2018
- Taiwan Semiconductor Manufacturing Company, Ltd
- Jacklyn Chang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dummy metal gate structures to reduce dishing during chemical-mecha...
- Patent number 9,601,489
- Issue date Mar 21, 2017
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chan-Hong Chern
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory array and method of operating the same
- Patent number 9,406,373
- Issue date Aug 2, 2016
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Derek C. Tao
- G11 - INFORMATION STORAGE
Information Patent Grant
Content addressable memory
- Patent number 9,280,633
- Issue date Mar 8, 2016
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Young Seog Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Dummy metal gate structures to reduce dishing during chemical-mecha...
- Patent number 9,209,182
- Issue date Dec 8, 2015
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chan-Hong Chern
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multiple bitcells tracking scheme semiconductor memory array
- Patent number 9,099,201
- Issue date Aug 4, 2015
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Derek C. Tao
- G11 - INFORMATION STORAGE
Information Patent Grant
Layout of memory cells
- Patent number 8,929,154
- Issue date Jan 6, 2015
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jacklyn Chang
- G11 - INFORMATION STORAGE
Information Patent Grant
Cell circuits and layouts used in write tracking circuits and read...
- Patent number 8,907,428
- Issue date Dec 9, 2014
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jacklyn Chang
- G11 - INFORMATION STORAGE
Information Patent Grant
Content addressable memory
- Patent number 8,760,900
- Issue date Jun 24, 2014
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Young Seog Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Multiple bitcells tracking scheme semiconductor memory array
- Patent number 8,760,948
- Issue date Jun 24, 2014
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Derek C. Tao
- G11 - INFORMATION STORAGE
Information Patent Grant
Layout of memory strap cell
- Patent number 8,704,376
- Issue date Apr 22, 2014
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jacklyn Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for memory cell layout
- Patent number 8,450,778
- Issue date May 28, 2013
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Jacklyn Chang
- G11 - INFORMATION STORAGE
Information Patent Grant
Content addressable memory design
- Patent number 8,395,920
- Issue date Mar 12, 2013
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Young Seog Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory leakage and data retention control
- Patent number 8,339,890
- Issue date Dec 25, 2012
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Kuoyuan (Peter) Hsu
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
SEMICONDUCTOR DEVICE
- Publication number 20210288043
- Publication date Sep 16, 2021
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Jacklyn CHANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Differential Read-Only Memory (ROM) Device
- Publication number 20200168256
- Publication date May 28, 2020
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Kuoyuan HSU
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CIRCUIT INCLUDING TRACKING CIRCUIT
- Publication number 20200168258
- Publication date May 28, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Kuoyuan (Peter) HSU
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CIRCUIT LAYOUT METHOD
- Publication number 20200091133
- Publication date Mar 19, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jacklyn CHANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR DEVICE
- Publication number 20200058634
- Publication date Feb 20, 2020
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Jacklyn CHANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIFFERENTIAL READ-ONLY MEMORY (ROM) DEVICE
- Publication number 20190237113
- Publication date Aug 1, 2019
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Kuoyuan HSU
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CIRCUIT INCLUDING TRACKING CIRCUIT
- Publication number 20190096457
- Publication date Mar 28, 2019
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Kuoyuan (Peter) HSU
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD OF OPERATING TRACKING CIRCUIT
- Publication number 20180204609
- Publication date Jul 19, 2018
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Kuoyuan (Peter) HSU
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CIRCUIT LAYOUT
- Publication number 20180130787
- Publication date May 10, 2018
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jacklyn CHANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY CIRCUIT HAVING TRACKING CIRCUIT
- Publication number 20160284388
- Publication date Sep 29, 2016
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Kuoyuan (Peter) HSU
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CIRCUIT, LAYOUT OF MEMORY CIRCUIT, AND METHOD OF FORMING LAYOUT
- Publication number 20160225753
- Publication date Aug 4, 2016
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jacklyn CHANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Dummy Metal Gate Structures to Reduce Dishing During Chemical-Mecha...
- Publication number 20160086949
- Publication date Mar 24, 2016
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chan-Hong Chern
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEMORY ARRAY AND METHOD OF OPERATING THE SAME
- Publication number 20150325287
- Publication date Nov 12, 2015
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Derek C. TAO
- G11 - INFORMATION STORAGE
Information Patent Application
MULTIPLE BITCELLS TRACKING SCHEME SEMICONDUCTOR MEMORY ARRAY
- Publication number 20140247675
- Publication date Sep 4, 2014
- Derek C. TAO
- G11 - INFORMATION STORAGE
Information Patent Application
CONTENT ADDRESSABLE MEMORY
- Publication number 20140250416
- Publication date Sep 4, 2014
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Young Seog KIM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DUMMY METAL GATE STRUCTURES TO REDUCE DISHING DURING CHEMICAL-MECHA...
- Publication number 20140183652
- Publication date Jul 3, 2014
- Chan-Hong Chern
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CELL CIRCUITS AND LAYOUTS USED IN WRITE TRACKING CIRCUITS AND READ...
- Publication number 20140138776
- Publication date May 22, 2014
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jacklyn CHANG
- G11 - INFORMATION STORAGE
Information Patent Application
MULTIPLE BITCELLS TRACKING SCHEME SEMICONDUCTOR MEMORY ARRAY
- Publication number 20140085993
- Publication date Mar 27, 2014
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Derek C. TAO
- G11 - INFORMATION STORAGE
Information Patent Application
LAYOUT OF MEMORY STRAP CELL
- Publication number 20130264718
- Publication date Oct 10, 2013
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jacklyn CHANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONTENT ADDRESSABLE MEMORY
- Publication number 20130155749
- Publication date Jun 20, 2013
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Young Seog KIM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LAYOUT OF MEMORY CELLS
- Publication number 20130088925
- Publication date Apr 11, 2013
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jacklyn CHANG
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND APPARATUS FOR MEMORY CELL LAYOUT
- Publication number 20120049374
- Publication date Mar 1, 2012
- Taiwan Semiconductor Manufacturing Co., LTD
- Jacklyn CHANG
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY LEAKAGE AND DATA RETENTION CONTROL
- Publication number 20110292753
- Publication date Dec 1, 2011
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Kuoyuan (Peter) HSU
- G11 - INFORMATION STORAGE
Information Patent Application
CONTENT ADDRESSABLE MEMORY DESIGN
- Publication number 20100328982
- Publication date Dec 30, 2010
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Young Seog KIM
- G06 - COMPUTING CALCULATING COUNTING

Jacklyn CHANG

Person

Patents Grantslast 30 patents

Semiconductor device

Semiconductor device

Memory circuit layout method

Memory circuit including tracking circuit

Differential read-only memory (ROM) device

Memory circuit having tracking circuit including series-connected t...

Differential read-only memory (ROM) device

Memory circuit layout

Method of operating tracking circuit

Memory circuit having tracking circuit including series-connected t...

Memory circuit, layout of memory circuit, and method of forming layout

Dummy metal gate structures to reduce dishing during chemical-mecha...

Memory array and method of operating the same

Content addressable memory

Dummy metal gate structures to reduce dishing during chemical-mecha...

Multiple bitcells tracking scheme semiconductor memory array

Layout of memory cells

Cell circuits and layouts used in write tracking circuits and read...

Content addressable memory

Multiple bitcells tracking scheme semiconductor memory array

Layout of memory strap cell

Method and apparatus for memory cell layout

Content addressable memory design

Memory leakage and data retention control

Patents Applicationslast 30 patents

SEMICONDUCTOR DEVICE

Differential Read-Only Memory (ROM) Device

MEMORY CIRCUIT INCLUDING TRACKING CIRCUIT

MEMORY CIRCUIT LAYOUT METHOD

SEMICONDUCTOR DEVICE

DIFFERENTIAL READ-ONLY MEMORY (ROM) DEVICE

MEMORY CIRCUIT INCLUDING TRACKING CIRCUIT

METHOD OF OPERATING TRACKING CIRCUIT

MEMORY CIRCUIT LAYOUT

MEMORY CIRCUIT HAVING TRACKING CIRCUIT

MEMORY CIRCUIT, LAYOUT OF MEMORY CIRCUIT, AND METHOD OF FORMING LAYOUT

Dummy Metal Gate Structures to Reduce Dishing During Chemical-Mecha...

MEMORY ARRAY AND METHOD OF OPERATING THE SAME

MULTIPLE BITCELLS TRACKING SCHEME SEMICONDUCTOR MEMORY ARRAY

CONTENT ADDRESSABLE MEMORY

DUMMY METAL GATE STRUCTURES TO REDUCE DISHING DURING CHEMICAL-MECHA...

CELL CIRCUITS AND LAYOUTS USED IN WRITE TRACKING CIRCUITS AND READ...

MULTIPLE BITCELLS TRACKING SCHEME SEMICONDUCTOR MEMORY ARRAY

LAYOUT OF MEMORY STRAP CELL

CONTENT ADDRESSABLE MEMORY

LAYOUT OF MEMORY CELLS

METHOD AND APPARATUS FOR MEMORY CELL LAYOUT

MEMORY LEAKAGE AND DATA RETENTION CONTROL

CONTENT ADDRESSABLE MEMORY DESIGN