JaeHyun Lee

Person

Kyungki-do, KR

People

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor device and method of forming dummy pillars between se...
- Patent number 10,096,540
- Issue date Oct 9, 2018
- STATS ChipPAC Pte. Ltd.
- KyungHoon Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming conductive layer over su...
- Patent number 9,679,846
- Issue date Jun 13, 2017
- STATS ChipPAC Pte. Ltd.
- JaeHyun Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming reduced surface roughnes...
- Patent number 9,460,972
- Issue date Oct 4, 2016
- STATS ChipPAC Pte. Ltd.
- SeongWon Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming conductive protrusion ov...
- Patent number 9,230,933
- Issue date Jan 5, 2016
- STATS ChipPAC, Ltd.
- JaeHyun Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with connection structure and m...
- Patent number 9,202,715
- Issue date Dec 1, 2015
- Stats Chippac Ltd.
- YoungChul Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming non-linear interconnect...
- Patent number 9,117,812
- Issue date Aug 25, 2015
- STATS ChipPAC, Ltd.
- JaeHyun Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor die and method of forming sloped surface in photoresi...
- Patent number 9,054,100
- Issue date Jun 9, 2015
- STATS ChipPAC, Ltd.
- JaeHyun Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device with conductive layer over substrate with vent...
- Patent number 8,952,529
- Issue date Feb 10, 2015
- STATS ChipPAC, Ltd.
- JaeHyun Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming non-linear interconnect...
- Patent number 8,642,384
- Issue date Feb 4, 2014
- STATS ChipPAC, Ltd.
- JaeHyun Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with film assistance mold and m...
- Patent number 8,524,538
- Issue date Sep 3, 2013
- Stats Chippac Ltd.
- JaeHyun Lee
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Semiconductor Device and Method of Forming Conductive Layer Over Su...
- Publication number 20150097295
- Publication date Apr 9, 2015
- STATS ChipPAC, Ltd.
- JaeHyun Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Non-Linear Interconnect...
- Publication number 20140103503
- Publication date Apr 17, 2014
- STATS ChipPAC, Ltd.
- JaeHyun Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Non-Linear Interconnect...
- Publication number 20130234318
- Publication date Sep 12, 2013
- STATS ChipPAC, Ltd.
- JaeHyun Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Reduced Surface Roughnes...
- Publication number 20130175701
- Publication date Jul 11, 2013
- STATS ChipPAC, Ltd.
- SeongWon Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH FILM ASSISTANCE MOLD AND M...
- Publication number 20130154121
- Publication date Jun 20, 2013
- JaeHyun Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Conductive Layer Over Su...
- Publication number 20130127042
- Publication date May 23, 2013
- STATS ChipPAC, Ltd.
- JaeHyun Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Die and Method of Forming Sloped Surface in Photoresi...
- Publication number 20130105967
- Publication date May 2, 2013
- STATS ChipPAC, Ltd.
- JaeHyun Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Conductive Protrusions O...
- Publication number 20130069221
- Publication date Mar 21, 2013
- STATS ChipPAC, Ltd.
- JaeHyun Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Dummy Pillars Between Se...
- Publication number 20120286418
- Publication date Nov 15, 2012
- STATS ChipPAC, Ltd.
- KyungHoon Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH CONNECTION STRUCTURE AND M...
- Publication number 20120119360
- Publication date May 17, 2012
- YoungChul Kim
- H01 - BASIC ELECTRIC ELEMENTS

JaeHyun Lee

Person

Patents Grantslast 30 patents

Semiconductor device and method of forming dummy pillars between se...

Semiconductor device and method of forming conductive layer over su...

Semiconductor device and method of forming reduced surface roughnes...

Semiconductor device and method of forming conductive protrusion ov...

Integrated circuit packaging system with connection structure and m...

Semiconductor device and method of forming non-linear interconnect...

Semiconductor die and method of forming sloped surface in photoresi...

Semiconductor device with conductive layer over substrate with vent...

Semiconductor device and method of forming non-linear interconnect...

Integrated circuit packaging system with film assistance mold and m...

Patents Applicationslast 30 patents

Semiconductor Device and Method of Forming Conductive Layer Over Su...

Semiconductor Device and Method of Forming Non-Linear Interconnect...

Semiconductor Device and Method of Forming Non-Linear Interconnect...

Semiconductor Device and Method of Forming Reduced Surface Roughnes...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH FILM ASSISTANCE MOLD AND M...

Semiconductor Device and Method of Forming Conductive Layer Over Su...

Semiconductor Die and Method of Forming Sloped Surface in Photoresi...

Semiconductor Device and Method of Forming Conductive Protrusions O...

Semiconductor Device and Method of Forming Dummy Pillars Between Se...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH CONNECTION STRUCTURE AND M...