Jagdish G. Belani

Person

Cupertino, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Thermal ball lead integrated package
- Patent number 5,705,851
- Issue date Jan 6, 1998
- National Semiconductor Corporation
- Shahram Mostafazadeh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor component package assembly including an integral RF/E...
- Patent number 5,650,659
- Issue date Jul 22, 1997
- National Semiconductor Corporation
- Shahram Mostafazadeh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package assemblies including an electrostatic di...
- Patent number 5,644,167
- Issue date Jul 1, 1997
- National Semiconductor Corporation
- Peter M. Weiler
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Ultra thin ball grid array using a flex tape or printed wiring boar...
- Patent number 5,620,928
- Issue date Apr 15, 1997
- National Semiconductor Corporation
- Shaw W. Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Tape automated bonding of bumped tape on bumped die
- Patent number 5,046,657
- Issue date Sep 10, 1991
- National Semiconductor Corporation
- Venkat Iyer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Use of a heat pipe integrated with the IC package for improving the...
- Patent number 4,912,548
- Issue date Mar 27, 1990
- National Semiconductor Corporation
- Bangalore J. Shanker
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
One-piece interconnection package and process
- Patent number 4,876,587
- Issue date Oct 24, 1989
- National Semiconductor Corporation
- Robert Hilton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
System for electroplating molded semiconductor devices
- Patent number 4,595,480
- Issue date Jun 17, 1986
- National Semiconductor Corporation
- Hem P. Takiar
- C25 - ELECTROLYTIC OR ELECTROPHORETIC PROCESSES APPARATUS THEREFOR
Information Patent Grant
Solder composition for thin coatings
- Patent number 4,486,511
- Issue date Dec 4, 1984
- National Semiconductor Corporation
- Yung-Shih Chen
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Polymeric insulation layer etching process and composition
- Patent number 4,411,735
- Issue date Oct 25, 1983
- National Semiconductor Corporation
- Jagdish G. Belani
- H01 - BASIC ELECTRIC ELEMENTS

Jagdish G. Belani

Person

Patents Grantslast 30 patents

Thermal ball lead integrated package

Semiconductor component package assembly including an integral RF/E...

Integrated circuit package assemblies including an electrostatic di...

Ultra thin ball grid array using a flex tape or printed wiring boar...

Tape automated bonding of bumped tape on bumped die

Use of a heat pipe integrated with the IC package for improving the...

One-piece interconnection package and process

System for electroplating molded semiconductor devices

Solder composition for thin coatings

Polymeric insulation layer etching process and composition