Membership
Tour
Register
Log in
Jaideep Mukherjee
Follow
Person
Los Altos, CA, US
People
Overview
Industries
Organizations
People
Information
Impact
Patents Grants
last 30 patents
Information
Patent Grant
Integrated circuit simulation with efficient memory usage
Patent number
10,303,828
Issue date
May 28, 2019
Cadence Design Systems, Inc.
Jaideep Mukherjee
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Integrated circuit simulation with variability analysis for efficie...
Patent number
10,248,745
Issue date
Apr 2, 2019
Cadence Design Systems, Inc.
Jaideep Mukherjee
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Integrated circuit simulation with data persistency for efficient m...
Patent number
10,248,747
Issue date
Apr 2, 2019
Cadence Design Systems, Inc.
Jaideep Mukherjee
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
System and method for containing analog verification IP
Patent number
9,038,008
Issue date
May 19, 2015
Cadence Design Systems, Inc.
Donald J. O'Riordan
G06 - COMPUTING CALCULATING COUNTING