Jairus Legaspi Pisigan

Person

Singapore, SG

People

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor device and method of forming overlapping semiconducto...
- Patent number 9,721,925
- Issue date Aug 1, 2017
- STATS ChipPAC, Pte. Ltd.
- Henry D. Bathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming leadframe with notched f...
- Patent number 9,472,427
- Issue date Oct 18, 2016
- STATS ChipPAC Pte. Ltd.
- Henry D. Bathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with a flip chip and method of...
- Patent number 9,034,692
- Issue date May 19, 2015
- Stats Chippac Ltd.
- Henry Descalzo Bathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Etched recess package on package system
- Patent number 8,941,219
- Issue date Jan 27, 2015
- Stats Chippac Ltd.
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming vertical interconnect st...
- Patent number 8,890,328
- Issue date Nov 18, 2014
- STATS ChipPAC, Ltd.
- Zigmund R. Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming overlapping semiconducto...
- Patent number 8,872,320
- Issue date Oct 28, 2014
- STATS ChipPAC, Ltd.
- Henry D. Bathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming a protective layer on a...
- Patent number 8,802,505
- Issue date Aug 12, 2014
- STATS ChipPAC, Ltd.
- Henry D. Bathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with interconnects and method o...
- Patent number 8,802,555
- Issue date Aug 12, 2014
- Stats Chippac Ltd.
- Henry Descalzo Bathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with flip chip and method of ma...
- Patent number 8,766,428
- Issue date Jul 1, 2014
- Stats Chippac Ltd.
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package system with anti-peel contact pads
- Patent number 8,652,881
- Issue date Feb 18, 2014
- Stats Chippac Ltd.
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package system having perimeter paddle
- Patent number 8,643,157
- Issue date Feb 4, 2014
- Stats Chippac Ltd.
- Lionel Chien Hui Tay
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package system with flex bump
- Patent number 8,637,394
- Issue date Jan 28, 2014
- Stats Chippac Ltd.
- Jairus Legaspi Pisigan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with interconnects and method o...
- Patent number 8,558,369
- Issue date Oct 15, 2013
- Stats Chippac Ltd.
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package system
- Patent number 8,513,801
- Issue date Aug 20, 2013
- Stats Chippac Ltd.
- Lionel Chien Hui Tay
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package system with extended corner leads
- Patent number 8,502,371
- Issue date Aug 6, 2013
- Stats Chippac Ltd.
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for a package having multiple stacked die
- Patent number 8,354,742
- Issue date Jan 15, 2013
- STATS ChipPAC, Ltd.
- Zigmund R. Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of manufacture of integrated circuit packaging system with s...
- Patent number 8,338,233
- Issue date Dec 25, 2012
- Stats Chippac Ltd.
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with bond wire pads and method...
- Patent number 8,304,337
- Issue date Nov 6, 2012
- Stats Chippac Ltd.
- Henry Descalzo Bathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fan-in interposer on lead frame for an integrated circuit package o...
- Patent number 8,304,869
- Issue date Nov 6, 2012
- Stats Chippac Ltd.
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package system with leads separated from a die p...
- Patent number 8,278,148
- Issue date Oct 2, 2012
- Stats Chippac Ltd.
- Jeffrey D. Punzalan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package system with package integration
- Patent number 8,258,614
- Issue date Sep 4, 2012
- Stats Chippac Ltd.
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with stacked integrated circuit...
- Patent number 8,236,607
- Issue date Aug 7, 2012
- Stats Chippac Ltd.
- Henry Descalzo Bathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package system with leaded package and method fo...
- Patent number 8,148,208
- Issue date Apr 3, 2012
- Stats Chippac Ltd.
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package system with leadfinger
- Patent number 8,148,825
- Issue date Apr 3, 2012
- Stats Chippac Ltd.
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package system with package encapsulation having...
- Patent number 8,129,827
- Issue date Mar 6, 2012
- Stats Chippac Ltd.
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming overlapping semiconducto...
- Patent number 8,110,440
- Issue date Feb 7, 2012
- STATS ChipPAC, Ltd.
- Henry D. Bathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming vertical interconnect st...
- Patent number 8,105,915
- Issue date Jan 31, 2012
- STATS ChipPAC, Ltd.
- Zigmund R. Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with plated pad and method of m...
- Patent number 8,106,502
- Issue date Jan 31, 2012
- Stats Chippac Ltd.
- Henry Descalzo Bathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with a dual substrate package a...
- Patent number 8,106,499
- Issue date Jan 31, 2012
- Stats Chippac Ltd.
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with stacked integrated circuit...
- Patent number 8,080,867
- Issue date Dec 20, 2011
- Stats Chippac Ltd.
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Semiconductor Device and Method of Forming Overlapping Semiconducto...
- Publication number 20150028496
- Publication date Jan 29, 2015
- STATS ChipPAC, Ltd.
- Henry D. Bathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH A FLIP CHIP AND METHOD OF...
- Publication number 20120241983
- Publication date Sep 27, 2012
- Henry Descalzo Bathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Leadframe With Notched F...
- Publication number 20120241915
- Publication date Sep 27, 2012
- STATS ChipPAC, Ltd.
- Henry D. Bathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERCONNECTS AND METHOD O...
- Publication number 20120241931
- Publication date Sep 27, 2012
- Henry Descalzo Bathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERCONNECTS AND METHOD O...
- Publication number 20120241968
- Publication date Sep 27, 2012
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Overlapping Semiconducto...
- Publication number 20120119361
- Publication date May 17, 2012
- STATS ChipPAC, Ltd.
- Henry D. Bathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Vertical Interconnect St...
- Publication number 20120074567
- Publication date Mar 29, 2012
- STATS ChipPAC, Ltd.
- Zigmund R. Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF MANUFACTURE OF INTEGRATED CIRCUIT PACKAGING SYSTEM WITH S...
- Publication number 20120064668
- Publication date Mar 15, 2012
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ETCHED RECESS PACKAGE ON PACKAGE SYSTEM
- Publication number 20110180928
- Publication date Jul 28, 2011
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH BOND WIRE PADS AND METHOD...
- Publication number 20110140287
- Publication date Jun 16, 2011
- Henry Descalzo Bathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH FLIP CHIP AND METHOD OF MA...
- Publication number 20110127661
- Publication date Jun 2, 2011
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH STACKED INTEGRATED CIRCUIT...
- Publication number 20110101542
- Publication date May 5, 2011
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH A DUAL SUBSTRATE PACKAGE A...
- Publication number 20100320583
- Publication date Dec 23, 2010
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH STACKED INTEGRATED CIRCUIT...
- Publication number 20100320586
- Publication date Dec 23, 2010
- Henry Descalzo Bathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Vertical Interconnect St...
- Publication number 20100314780
- Publication date Dec 16, 2010
- STATS ChipPAC, Ltd.
- Zigmund R. Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Overlapping Semiconducto...
- Publication number 20100289131
- Publication date Nov 18, 2010
- STATS ChipPAC, Ltd.
- Henry D. Bathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH LEADED PACKAGE AND METHOD FO...
- Publication number 20100264525
- Publication date Oct 21, 2010
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PLATED PAD AND METHOD OF M...
- Publication number 20100123229
- Publication date May 20, 2010
- Henry Descalzo Bathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH SINGULATION PROCESS
- Publication number 20100078831
- Publication date Apr 1, 2010
- Jairus Legaspi Pisigan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming a Protective Layer on a...
- Publication number 20100078834
- Publication date Apr 1, 2010
- STATS ChipPAC, Ltd.
- Henry D. Bathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH ANTI-PEEL PAD
- Publication number 20100072591
- Publication date Mar 25, 2010
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE SYSTEM
- Publication number 20100038761
- Publication date Feb 18, 2010
- Lionel Chien Hui Tay
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FAN-IN INTERPOSER ON LEAD FRAME FOR AN INTEGRATED CIRCUIT PACKAGE O...
- Publication number 20100025834
- Publication date Feb 4, 2010
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
A METHOD FOR FORMING AN ETCHED RECESS PACKAGE ON PACKAGE SYSTEM
- Publication number 20100025830
- Publication date Feb 4, 2010
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTI-LAYER PACKAGE-ON-PACKAGE SYSTEM
- Publication number 20100025836
- Publication date Feb 4, 2010
- Lionel Chien Hui Tay
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method and Apparatus For a Package Having Multiple Stacked Die
- Publication number 20090243064
- Publication date Oct 1, 2009
- STATS ChipPAC, Ltd.
- Zigmund R. Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH EXTENDED CORNER LEADS
- Publication number 20090166845
- Publication date Jul 2, 2009
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH PACKAGE INTEGRATION
- Publication number 20090121335
- Publication date May 14, 2009
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH DUAL CONNECTIVITY
- Publication number 20090115032
- Publication date May 7, 2009
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH BASE STRUCTURE DEVICE
- Publication number 20090085178
- Publication date Apr 2, 2009
- Jong-Woo Ha
- H01 - BASIC ELECTRIC ELEMENTS

Jairus Legaspi Pisigan

Person

Patents Grantslast 30 patents

Semiconductor device and method of forming overlapping semiconducto...

Semiconductor device and method of forming leadframe with notched f...

Integrated circuit packaging system with a flip chip and method of...

Etched recess package on package system

Semiconductor device and method of forming vertical interconnect st...

Semiconductor device and method of forming overlapping semiconducto...

Semiconductor device and method of forming a protective layer on a...

Integrated circuit packaging system with interconnects and method o...

Integrated circuit packaging system with flip chip and method of ma...

Integrated circuit package system with anti-peel contact pads

Integrated circuit package system having perimeter paddle

Integrated circuit package system with flex bump

Integrated circuit packaging system with interconnects and method o...

Integrated circuit package system

Integrated circuit package system with extended corner leads

Method and apparatus for a package having multiple stacked die

Method of manufacture of integrated circuit packaging system with s...

Integrated circuit packaging system with bond wire pads and method...

Fan-in interposer on lead frame for an integrated circuit package o...

Integrated circuit package system with leads separated from a die p...

Integrated circuit package system with package integration

Integrated circuit packaging system with stacked integrated circuit...

Integrated circuit package system with leaded package and method fo...

Integrated circuit package system with leadfinger

Integrated circuit package system with package encapsulation having...

Semiconductor device and method of forming overlapping semiconducto...

Semiconductor device and method of forming vertical interconnect st...

Integrated circuit packaging system with plated pad and method of m...

Integrated circuit packaging system with a dual substrate package a...

Integrated circuit packaging system with stacked integrated circuit...

Patents Applicationslast 30 patents

Semiconductor Device and Method of Forming Overlapping Semiconducto...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH A FLIP CHIP AND METHOD OF...

Semiconductor Device and Method of Forming Leadframe With Notched F...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERCONNECTS AND METHOD O...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERCONNECTS AND METHOD O...

Semiconductor Device and Method of Forming Overlapping Semiconducto...

Semiconductor Device and Method of Forming Vertical Interconnect St...

METHOD OF MANUFACTURE OF INTEGRATED CIRCUIT PACKAGING SYSTEM WITH S...

ETCHED RECESS PACKAGE ON PACKAGE SYSTEM

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH BOND WIRE PADS AND METHOD...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH FLIP CHIP AND METHOD OF MA...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH STACKED INTEGRATED CIRCUIT...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH A DUAL SUBSTRATE PACKAGE A...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH STACKED INTEGRATED CIRCUIT...

Semiconductor Device and Method of Forming Vertical Interconnect St...

Semiconductor Device and Method of Forming Overlapping Semiconducto...

INTEGRATED CIRCUIT PACKAGE SYSTEM WITH LEADED PACKAGE AND METHOD FO...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PLATED PAD AND METHOD OF M...

INTEGRATED CIRCUIT PACKAGE SYSTEM WITH SINGULATION PROCESS

Semiconductor Device and Method of Forming a Protective Layer on a...

INTEGRATED CIRCUIT PACKAGE SYSTEM WITH ANTI-PEEL PAD

INTEGRATED CIRCUIT PACKAGE SYSTEM

FAN-IN INTERPOSER ON LEAD FRAME FOR AN INTEGRATED CIRCUIT PACKAGE O...

A METHOD FOR FORMING AN ETCHED RECESS PACKAGE ON PACKAGE SYSTEM

MULTI-LAYER PACKAGE-ON-PACKAGE SYSTEM

Method and Apparatus For a Package Having Multiple Stacked Die

INTEGRATED CIRCUIT PACKAGE SYSTEM WITH EXTENDED CORNER LEADS

INTEGRATED CIRCUIT PACKAGE SYSTEM WITH PACKAGE INTEGRATION

INTEGRATED CIRCUIT PACKAGE SYSTEM WITH DUAL CONNECTIVITY

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH BASE STRUCTURE DEVICE