James B. Cecil

Person

Santa Clara, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Circuit to reduce dropout voltage in a low dropout voltage regulato...
- Patent number 5,410,241
- Issue date Apr 25, 1995
- National Semiconductor Corporation
- James B. Cecil
- G05 - CONTROLLING REGULATING
Information Patent Grant
Resistor programmable velocity controller
- Patent number 4,963,802
- Issue date Oct 16, 1990
- Elantec
- William H. Gross
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Digital protection circuit and method for linear amplifier
- Patent number 4,878,034
- Issue date Oct 31, 1989
- Elantec
- William H. Gross
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Multi stage resistive ladder network having extra stages for trimming
- Patent number 4,338,590
- Issue date Jul 6, 1982
- National Semiconductor Corporation
- Joseph J. Connolly
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Digital to analog conversion circuit including compensation FET'S
- Patent number 4,267,550
- Issue date May 12, 1981
- National Semiconductor Corporation
- James B. Cecil
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Statistical enhancement of the accuracy of a ratio-matched network...
- Patent number 4,224,564
- Issue date Sep 23, 1980
- National Semiconductor Corporation
- Robert C. Dobkin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Conversion circuit
- Patent number 4,160,244
- Issue date Jul 3, 1979
- National Semiconductor Corporation
- James E. Solomon
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Voltage translator for interfacing TTL and CMOS circuits
- Patent number 4,128,775
- Issue date Dec 5, 1978
- National Semiconductor Corporation
- Thomas M. Frederiksen
- G05 - CONTROLLING REGULATING

James B. Cecil

Person

Patents Grantslast 30 patents

Circuit to reduce dropout voltage in a low dropout voltage regulato...

Resistor programmable velocity controller

Digital protection circuit and method for linear amplifier

Multi stage resistive ladder network having extra stages for trimming

Digital to analog conversion circuit including compensation FET'S

Statistical enhancement of the accuracy of a ratio-matched network...

Conversion circuit

Voltage translator for interfacing TTL and CMOS circuits