James B Crossland

Person

Banks, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Methods, apparatus, and instructions for user-level thread suspension
- Patent number 12,020,031
- Issue date Jun 25, 2024
- Intel Corporation
- Michael Mishaeli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Linear to physical address translation with support for page attrib...
- Patent number 11,074,191
- Issue date Jul 27, 2021
- Intel Corporation
- Ben-Zion Friedman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods, apparatus, and instructions for user level thread suspension
- Patent number 11,023,233
- Issue date Jun 1, 2021
- Intel Corporation
- Michael Mishaeli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods for generating a suppressed address trace
- Patent number 10,346,167
- Issue date Jul 9, 2019
- Intel Corporation
- Toby Opferman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System for configuring partitions within non-volatile random access...
- Patent number 10,001,953
- Issue date Jun 19, 2018
- Intel Corporation
- Leena K. Puthiyedath
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for TLB shoot-down in a heterogeneous computin...
- Patent number 9,916,257
- Issue date Mar 13, 2018
- Intel Corporation
- Rajesh M. Sankaran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
RAM disk using non-volatile random access memory
- Patent number 9,852,069
- Issue date Dec 26, 2017
- Intel Corporation
- James B. Crossland
- G11 - INFORMATION STORAGE
Information Patent Grant
Instruction and logic for machine checking communication
- Patent number 9,842,015
- Issue date Dec 12, 2017
- Intel Corporation
- Ashok Raj
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
RAM disk using non-volatile random access memory
- Patent number 9,535,827
- Issue date Jan 3, 2017
- Intel Corporation
- James B. Crossland
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus for configuring partitions within phase change memory of...
- Patent number 9,529,708
- Issue date Dec 27, 2016
- Intel Corporation
- Leena K. Puthiyedath
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods for generating a suppressed address trace
- Patent number 9,524,227
- Issue date Dec 20, 2016
- Intel Corporation
- Toby Opferman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Machine check summary register
- Patent number 9,317,360
- Issue date Apr 19, 2016
- Intel Corporation
- Jose A. Vargas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for preventing unauthorized stack pivoting
- Patent number 9,239,801
- Issue date Jan 19, 2016
- Intel Corporation
- Baiju V. Patel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Robust and high performance instructions for system call
- Patent number 9,207,940
- Issue date Dec 8, 2015
- Intel Corporation
- Baiju V. Patel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Linear to physical address translation with support for page attrib...
- Patent number 9,164,917
- Issue date Oct 20, 2015
- Intel Corporation
- Ohad Falik
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Linear to physical address translation with support for page attrib...
- Patent number 9,164,916
- Issue date Oct 20, 2015
- Intel Corporation
- Ohad Falik
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Linear to physical address translation with support for page attrib...
- Patent number 9,158,703
- Issue date Oct 13, 2015
- Intel Corporation
- Ohad Falik
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for tracking TLB flushes on a per thread basis
- Patent number 9,081,707
- Issue date Jul 14, 2015
- Intel Corporation
- Shaun M. Conrad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing and tracking thread access to operating system extended fe...
- Patent number 9,058,201
- Issue date Jun 16, 2015
- Intel Corporation
- Michael Mishaeli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technique for communicating interrupts in a computer system
- Patent number 9,043,521
- Issue date May 26, 2015
- Intel Corporation
- Keshavan Tiruvallur
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Inter-processor interrupts
- Patent number 8,984,199
- Issue date Mar 17, 2015
- Intel Corporation
- Per Hammarlund
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System, apparatus, and method for segment register read and write r...
- Patent number 8,938,606
- Issue date Jan 20, 2015
- Intel Corporation
- Baiju V. Patel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Linear to physical address translation with support for page attrib...
- Patent number 8,799,620
- Issue date Aug 5, 2014
- Intel Corporation
- Ohad Falik
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable event-driven yield mechanism
- Patent number 8,762,694
- Issue date Jun 24, 2014
- Intel Corporation
- Xiang Zou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Context state management for processor feature sets
- Patent number 8,677,163
- Issue date Mar 18, 2014
- Intel Corporation
- Don Van Dyke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing and implementing metadata in central processing unit using...
- Patent number 8,635,415
- Issue date Jan 21, 2014
- Intel Corporation
- Baiju V. Patel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Context state management for processor feature sets
- Patent number 8,631,261
- Issue date Jan 14, 2014
- Intel Corporation
- Don A. Van Dyke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technique for communicating interrupts in a computer system
- Patent number 8,312,198
- Issue date Nov 13, 2012
- Intel Corporation
- Keshavan Tiruvallur
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Detecting spin loops in a virtual machine environment
- Patent number 8,230,203
- Issue date Jul 24, 2012
- Intel Corporation
- Gilbert Neiger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Using a processor identification instruction to provide multi-level...
- Patent number 8,122,230
- Issue date Feb 21, 2012
- Intel Corporation
- Leena K. Puthiyedath
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
LINEAR TO PHYSICAL ADDRESS TRANSLATION WITH SUPPORT FOR PAGE ATTRIB...
- Publication number 20220050791
- Publication date Feb 17, 2022
- Ben-Zion Friedman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS, APPARATUS, AND INSTRUCTIONS FOR USER-LEVEL THREAD SUSPENSION
- Publication number 20210357214
- Publication date Nov 18, 2021
- Intel Corporation
- Michael Mishaeli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LINEAR TO PHYSICAL ADDRESS TRANSLATION WITH SUPPORT FOR PAGE ATTRIB...
- Publication number 20180060246
- Publication date Mar 1, 2018
- Intel Corporation
- Ben-Zion Friedman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS, APPARATUS, AND INSTRUCTIONS FOR USER-LEVEL THREAD SUSPENSION
- Publication number 20170228233
- Publication date Aug 10, 2017
- Intel Corporation
- Michael Mishaeli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RAM DISK USING NON-VOLATILE RANDOM ACCESS MEMORY
- Publication number 20170139827
- Publication date May 18, 2017
- Intel Corporation
- James B. Crossland
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NON-VOLATILE RANDOM ACCESS MEMORY (NVRAM) AS A REPLACEMENT FOR TRAD...
- Publication number 20170139649
- Publication date May 18, 2017
- Leena K. PUTHIYEDATH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND METHODS FOR GENERATING A SUPPRESSED ADDRESS TRACE
- Publication number 20170102947
- Publication date Apr 13, 2017
- Intel Corporation
- TOBY OPFERMAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Software-Initiated Trace Integrated with Hardware Trace
- Publication number 20160378636
- Publication date Dec 29, 2016
- Intel Corporation
- Beeman C. Strong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Robust and High Performance Instructions for System Call
- Publication number 20160092227
- Publication date Mar 31, 2016
- Intel Corporation
- Baiju V. Patel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LINEAR TO PHYSICAL ADDRESS TRANSLATION WITH SUPPORT FOR PAGE ATTRIB...
- Publication number 20160041921
- Publication date Feb 11, 2016
- Intel Corporation
- Ben-Zion Friedman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND METHODS FOR GENERATING A SUPPRESSED ADDRESS TRACE
- Publication number 20160011872
- Publication date Jan 14, 2016
- Intel Corporation
- TOBY OPFERMAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Instruction and Logic for Machine Checking Communication
- Publication number 20150095705
- Publication date Apr 2, 2015
- ASHOK RAJ
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR PREVENTING UNAUTHORIZED STACK PIVOTING
- Publication number 20140365742
- Publication date Dec 11, 2014
- BAIJU V. PATEL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LINEAR TO PHYSICAL ADDRESS TRANSLATION WITH SUPPORT FOR PAGE ATTRIB...
- Publication number 20140351553
- Publication date Nov 27, 2014
- Intel Corporation
- Ohad Falik
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LINEAR TO PHYSICAL ADDRESS TRANSLATION WITH SUPPORT FOR PAGE ATTRIB...
- Publication number 20140351554
- Publication date Nov 27, 2014
- Intel Corporation
- Ohad Falik
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LINEAR TO PHYSICAL ADDRESS TRANSLATION WITH SUPPORT FOR PAGE ATTRIB...
- Publication number 20140304488
- Publication date Oct 9, 2014
- Ohad Falik
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NON-VOLATILE RANDOM ACCESS MEMORY (NVRAM) AS A REPLACEMENT FOR TRAD...
- Publication number 20140297938
- Publication date Oct 2, 2014
- Leena K. Puthiyedath
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Robust and High Performance Instructions for System Call
- Publication number 20140281437
- Publication date Sep 18, 2014
- Baiju V. Patel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus and Method For Tracking TLB Flushes On A Per Thread Basis
- Publication number 20140189285
- Publication date Jul 3, 2014
- Shaun M. CONRAD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUE FOR COMMUNICATING INTERRUPTS IN A COMPUTER SYSTEM
- Publication number 20140136746
- Publication date May 15, 2014
- Keshavan Tiruvallur
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONTEXT-STATE MANAGEMENT
- Publication number 20140013333
- Publication date Jan 9, 2014
- Michael Mishaeli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NON-VOLATILE RAM DISK
- Publication number 20140013045
- Publication date Jan 9, 2014
- James B. Crossland
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Machine Check Summary Register
- Publication number 20130339829
- Publication date Dec 19, 2013
- Jose A. Vargas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONTEXT STATE MANAGEMENT FOR PROCESSOR FEATURE SETS
- Publication number 20130219154
- Publication date Aug 22, 2013
- Don A. Van Dyke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONTEXT STATE MANAGEMENT FOR PROCESSOR FEATURE SETS
- Publication number 20130042093
- Publication date Feb 14, 2013
- Don A. Van Dyke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR TLB SHOOT-DOWN IN A HETEROGENEOUS COMPUTIN...
- Publication number 20130031333
- Publication date Jan 31, 2013
- Rajesh M. Sankaran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM, APPARATUS, AND METHOD FOR SEGMENT REGISTER READ AND WRITE R...
- Publication number 20120166767
- Publication date Jun 28, 2012
- Baiju V. Patel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUE FOR COMMUNICATING INTERRUPTS IN A COMPUTER SYSTEM
- Publication number 20120124264
- Publication date May 17, 2012
- Keshavan Tiruvallur
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGING AND IMPLEMENTING METADATA IN CENTRAL PROCESSING UNIT USING...
- Publication number 20110078389
- Publication date Mar 31, 2011
- Baiju V. Patel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Technique for communicating interrupts in a computer system
- Publication number 20100106875
- Publication date Apr 29, 2010
- Keshavan Tiruvallur
- G06 - COMPUTING CALCULATING COUNTING

James B Crossland

Person

Patents Grantslast 30 patents

Methods, apparatus, and instructions for user-level thread suspension

Linear to physical address translation with support for page attrib...

Methods, apparatus, and instructions for user level thread suspension

Apparatuses and methods for generating a suppressed address trace

System for configuring partitions within non-volatile random access...

Method and apparatus for TLB shoot-down in a heterogeneous computin...

RAM disk using non-volatile random access memory

Instruction and logic for machine checking communication

RAM disk using non-volatile random access memory

Apparatus for configuring partitions within phase change memory of...

Apparatuses and methods for generating a suppressed address trace

Machine check summary register

Systems and methods for preventing unauthorized stack pivoting

Robust and high performance instructions for system call

Linear to physical address translation with support for page attrib...

Linear to physical address translation with support for page attrib...

Linear to physical address translation with support for page attrib...

Apparatus and method for tracking TLB flushes on a per thread basis

Managing and tracking thread access to operating system extended fe...

Technique for communicating interrupts in a computer system

Inter-processor interrupts

System, apparatus, and method for segment register read and write r...

Linear to physical address translation with support for page attrib...

Programmable event-driven yield mechanism

Context state management for processor feature sets

Managing and implementing metadata in central processing unit using...

Context state management for processor feature sets

Technique for communicating interrupts in a computer system

Detecting spin loops in a virtual machine environment

Using a processor identification instruction to provide multi-level...

Patents Applicationslast 30 patents

LINEAR TO PHYSICAL ADDRESS TRANSLATION WITH SUPPORT FOR PAGE ATTRIB...

METHODS, APPARATUS, AND INSTRUCTIONS FOR USER-LEVEL THREAD SUSPENSION

LINEAR TO PHYSICAL ADDRESS TRANSLATION WITH SUPPORT FOR PAGE ATTRIB...

METHODS, APPARATUS, AND INSTRUCTIONS FOR USER-LEVEL THREAD SUSPENSION

RAM DISK USING NON-VOLATILE RANDOM ACCESS MEMORY

NON-VOLATILE RANDOM ACCESS MEMORY (NVRAM) AS A REPLACEMENT FOR TRAD...

APPARATUSES AND METHODS FOR GENERATING A SUPPRESSED ADDRESS TRACE

Software-Initiated Trace Integrated with Hardware Trace

Robust and High Performance Instructions for System Call

LINEAR TO PHYSICAL ADDRESS TRANSLATION WITH SUPPORT FOR PAGE ATTRIB...

APPARATUSES AND METHODS FOR GENERATING A SUPPRESSED ADDRESS TRACE

Instruction and Logic for Machine Checking Communication

SYSTEMS AND METHODS FOR PREVENTING UNAUTHORIZED STACK PIVOTING

LINEAR TO PHYSICAL ADDRESS TRANSLATION WITH SUPPORT FOR PAGE ATTRIB...

LINEAR TO PHYSICAL ADDRESS TRANSLATION WITH SUPPORT FOR PAGE ATTRIB...

LINEAR TO PHYSICAL ADDRESS TRANSLATION WITH SUPPORT FOR PAGE ATTRIB...

NON-VOLATILE RANDOM ACCESS MEMORY (NVRAM) AS A REPLACEMENT FOR TRAD...

Robust and High Performance Instructions for System Call

Apparatus and Method For Tracking TLB Flushes On A Per Thread Basis

TECHNIQUE FOR COMMUNICATING INTERRUPTS IN A COMPUTER SYSTEM

CONTEXT-STATE MANAGEMENT

NON-VOLATILE RAM DISK

Machine Check Summary Register

CONTEXT STATE MANAGEMENT FOR PROCESSOR FEATURE SETS

CONTEXT STATE MANAGEMENT FOR PROCESSOR FEATURE SETS

METHOD AND APPARATUS FOR TLB SHOOT-DOWN IN A HETEROGENEOUS COMPUTIN...

SYSTEM, APPARATUS, AND METHOD FOR SEGMENT REGISTER READ AND WRITE R...

TECHNIQUE FOR COMMUNICATING INTERRUPTS IN A COMPUTER SYSTEM

MANAGING AND IMPLEMENTING METADATA IN CENTRAL PROCESSING UNIT USING...

Technique for communicating interrupts in a computer system