James B. Eifert

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Secure low voltage testing
- Patent number 9,891,277
- Issue date Feb 13, 2018
- NXP USA, INC.
- Joel R. Knight
- G01 - MEASURING TESTING
Information Patent Grant
System and method for soft error detection in memory devices
- Patent number 8,717,829
- Issue date May 6, 2014
- FREESCALE SEMICONDUCTOR, INC.
- Ashish Sharma
- G11 - INFORMATION STORAGE
Information Patent Grant
Processor and method for dynamic and selective alteration of addres...
- Patent number 8,386,747
- Issue date Feb 26, 2013
- FREESCALE SEMICONDUCTOR, INC.
- William C. Moyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-volatile storage alteration tracking
- Patent number 8,380,918
- Issue date Feb 19, 2013
- FREESCALE SEMICONDUCTOR, INC.
- Richard Soja
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error detector in a cache memory using configurable way redundancy
- Patent number 7,809,980
- Issue date Oct 5, 2010
- Jehoda Refaeli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for performing access censorship in a data pro...
- Patent number 6,499,092
- Issue date Dec 24, 2002
- Motorola, Inc.
- Wallace B. Harwood
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for performing access censorship in a data pro...
- Patent number 6,240,493
- Issue date May 29, 2001
- Motorola, Inc.
- Wallace B. Hardwood
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data processing system having selectable exception table relocation...
- Patent number 6,079,015
- Issue date Jun 20, 2000
- Motorola, Inc.
- Wallace B. Harwood
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit having programmable pull device configured to en...
- Patent number 6,052,746
- Issue date Apr 18, 2000
- Motorola, Inc.
- Seshagiri Prasad Kalluri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data processing system having a memory with both a high speed opera...
- Patent number 5,737,566
- Issue date Apr 7, 1998
- Motorola, Inc.
- Robert Wayne Sparks
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for performing atomic accesses in a data proce...
- Patent number 5,727,172
- Issue date Mar 10, 1998
- Motorola, Inc.
- James B. Eifert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for communicating between master and slave ele...
- Patent number 5,717,931
- Issue date Feb 10, 1998
- Motorola, Inc.
- Adi Sapir
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for implementing a in-order termination bus pr...
- Patent number 5,699,516
- Issue date Dec 16, 1997
- Motorola, Inc.
- Adi Sapir
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for controlling show cycles in a data processi...
- Patent number 5,675,749
- Issue date Oct 7, 1997
- Motorola, Inc.
- Jay A. Hartvigsen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data processor with controlled burst memory accesses and method the...
- Patent number 5,651,138
- Issue date Jul 22, 1997
- Motorola, Inc.
- Chinh Hoang Le
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data processor with a multi-level protection mechanism, multi-level...
- Patent number 5,649,159
- Issue date Jul 15, 1997
- Motorola, Inc.
- Chinh H. Le
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Modular chip select control circuit and method for performing pipel...
- Patent number 5,617,559
- Issue date Apr 1, 1997
- Motorola Inc.
- Chinh H. Le
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable pin configuration logic circuit for providing a chip s...
- Patent number 5,511,182
- Issue date Apr 23, 1996
- Motorola, Inc.
- Chinh H. Le
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit microprocessor with programmable chip select logic
- Patent number 5,448,744
- Issue date Sep 5, 1995
- Motorola, Inc.
- James B. Eifert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microprocessor which optimizes bus utilization based upon bus speed
- Patent number 5,329,621
- Issue date Jul 12, 1994
- Motorola, Inc.
- Bradley G. Burgess
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data processor having a multi-stage instruction pipe and selection...
- Patent number 5,276,824
- Issue date Jan 4, 1994
- Motorola, Inc.
- Robert J. Skruhak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data processor microsequencer having multiple microaddress sources...
- Patent number 5,241,637
- Issue date Aug 31, 1993
- Motorola, Inc.
- Robert J. Skruhak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Direct memory access controller using prioritized interrupts for va...
- Patent number 5,072,365
- Issue date Dec 10, 1991
- Motorola, Inc.
- Bradley G. Burgess
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
SECURE LOW VOLTAGE TESTING
- Publication number 20160091561
- Publication date Mar 31, 2016
- FREESCALE SEMICONDUCTOR, INC.
- JOEL R. KNIGHT
- G01 - MEASURING TESTING
Information Patent Application
SYSTEM AND METHOD FOR SOFT ERROR DETECTION IN MEMORY DEVICES
- Publication number 20130343133
- Publication date Dec 26, 2013
- FREESCALE SEMICONDUCTOR, INC.
- Ashish Sharma
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE STORAGE ALTERATION TRACKING
- Publication number 20110167198
- Publication date Jul 7, 2011
- Richard Soja
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR AND METHOD FOR DYNAMIC AND SELECTIVE ALTERATION OF ADDRES...
- Publication number 20100318761
- Publication date Dec 16, 2010
- FREESCALE SEMICONDUCTOR, INC.
- William C. Moyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR DETECTOR IN A CACHE MEMORY USING CONFIGURABLE WAY REDUNDANCY
- Publication number 20090150720
- Publication date Jun 11, 2009
- Jehoda Rafaeli
- G06 - COMPUTING CALCULATING COUNTING

James B. Eifert

Person

Patents Grantslast 30 patents

Secure low voltage testing

System and method for soft error detection in memory devices

Processor and method for dynamic and selective alteration of addres...

Non-volatile storage alteration tracking

Error detector in a cache memory using configurable way redundancy

Method and apparatus for performing access censorship in a data pro...

Method and apparatus for performing access censorship in a data pro...

Data processing system having selectable exception table relocation...

Integrated circuit having programmable pull device configured to en...

Data processing system having a memory with both a high speed opera...

Method and apparatus for performing atomic accesses in a data proce...

Method and apparatus for communicating between master and slave ele...

Method and apparatus for implementing a in-order termination bus pr...

Method and apparatus for controlling show cycles in a data processi...

Data processor with controlled burst memory accesses and method the...

Data processor with a multi-level protection mechanism, multi-level...

Modular chip select control circuit and method for performing pipel...

Programmable pin configuration logic circuit for providing a chip s...

Integrated circuit microprocessor with programmable chip select logic

Microprocessor which optimizes bus utilization based upon bus speed

Data processor having a multi-stage instruction pipe and selection...

Data processor microsequencer having multiple microaddress sources...

Direct memory access controller using prioritized interrupts for va...

Patents Applicationslast 30 patents

SECURE LOW VOLTAGE TESTING

SYSTEM AND METHOD FOR SOFT ERROR DETECTION IN MEMORY DEVICES

NON-VOLATILE STORAGE ALTERATION TRACKING

PROCESSOR AND METHOD FOR DYNAMIC AND SELECTIVE ALTERATION OF ADDRES...

ERROR DETECTOR IN A CACHE MEMORY USING CONFIGURABLE WAY REDUNDANCY