JAMES D. BURNETT

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MEYLAN, FR

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Patents Grantslast 30 patents

Information Patent Grant
Method for forming one transistor DRAM cell structure
- Patent number 8,283,244
- Issue date Oct 9, 2012
- FREESCALE SEMICONDUCTOR, INC.
- James D. Burnett
- G11 - INFORMATION STORAGE
Information Patent Grant
One transistor DRAM cell structure
- Patent number 7,608,898
- Issue date Oct 27, 2009
- FREESCALE SEMICONDUCTOR, INC.
- James D. Burnett
- G11 - INFORMATION STORAGE
Information Patent Grant
Two-port SRAM having improved write operation
- Patent number 7,440,313
- Issue date Oct 21, 2008
- FREESCALE SEMICONDUCTOR, INC.
- Glenn C. Abeln
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
ONE TRANSISTOR DRAM CELL STRUCTURE AND METHOD FOR FORMING
- Publication number 20100001326
- Publication date Jan 7, 2010
- FREESCALE SEMICONDUCTOR, INC.
- JAMES D. BURNETT
- G11 - INFORMATION STORAGE
Information Patent Application
TWO-PORT SRAM HAVING IMPROVED WRITE OPERATION
- Publication number 20080117665
- Publication date May 22, 2008
- Glenn C. Abeln
- G11 - INFORMATION STORAGE
Information Patent Application
ONE TRANSISTOR DRAM CELL STRUCTURE AND METHOD FOR FORMING
- Publication number 20080099808
- Publication date May 1, 2008
- James D. Burnett
- G11 - INFORMATION STORAGE