James D. Kelly

Person

Scotts Valley, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Bus transaction reordering in a computer system having unordered sl...
- Patent number RE44688
- Issue date Dec 31, 2013
- Apple Inc.
- James D. Kelly
- 710 - Electrical computers and digital data processing systems: input/output
Information Patent Grant
Bus transaction reordering in a computer system having unordered sl...
- Patent number RE38428
- Issue date Feb 10, 2004
- Apple Computer, Inc.
- James D. Kelly
- 710 - Electrical computers and digital data processing systems: input/output
Information Patent Grant
Memory control device with split read for ROM access
- Patent number 6,336,166
- Issue date Jan 1, 2002
- Apple Computer, Inc.
- James D. Kelly
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bus transaction reordering in a computer system having unordered sl...
- Patent number 5,996,036
- Issue date Nov 30, 1999
- Apple Computers, Inc.
- James D. Kelly
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for serialized interrupt transmission
- Patent number 5,951,669
- Issue date Sep 14, 1999
- Apple Computer, Inc.
- Robert L. Bailey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Deadlock avoidance in a split-bus computer system
- Patent number 5,933,612
- Issue date Aug 3, 1999
- Apple Computer, Inc.
- James D. Kelly
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Deadlock avoidance in a computer system having unordered slaves
- Patent number 5,930,485
- Issue date Jul 27, 1999
- Apple Computer, Inc.
- James D. Kelly
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for dynamic buffer allocation in a bus bridge...
- Patent number 5,802,055
- Issue date Sep 1, 1998
- Apple Computer, Inc.
- William Todd Krein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Line data architecture and bus interface circuits and methods for d...
- Patent number 5,748,917
- Issue date May 5, 1998
- Apple Computer, Inc.
- William Todd Krein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for coordinating access to a bus
- Patent number 5,630,077
- Issue date May 13, 1997
- Apple Computer, Inc.
- William T. Krein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bus transaction reordering using side-band information signals
- Patent number 5,592,631
- Issue date Jan 7, 1997
- Apple Computer, Inc.
- James D. Kelly
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bus protocol using separate clocks for arbitration and data transfer
- Patent number 5,590,130
- Issue date Dec 31, 1996
- Apple Computer, Inc.
- William T. Krein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for interleaving memory banks
- Patent number 5,579,277
- Issue date Nov 26, 1996
- Apple Computer, Inc.
- James D. Kelly
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic memory refresh controller and method
- Patent number 5,557,578
- Issue date Sep 17, 1996
- Apple Computer, Inc.
- James D. Kelly
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for performing wake-up operations to a memory
- Patent number 5,557,577
- Issue date Sep 17, 1996
- Apple Computer, Inc.
- James D. Kelly
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and system for improving bus utilization efficiency
- Patent number 5,557,755
- Issue date Sep 17, 1996
- Apple Computer, Inc.
- William T. Krein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for pipelining bus requests
- Patent number 5,473,762
- Issue date Dec 5, 1995
- Apple Computer Inc.
- William T. Krein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bus deadlock avoidance during master split-transactions
- Patent number 5,469,435
- Issue date Nov 21, 1995
- Apple Computer, Inc.
- William T. Krein
- G06 - COMPUTING CALCULATING COUNTING

James D. Kelly

Person

Patents Grantslast 30 patents

Bus transaction reordering in a computer system having unordered sl...

Bus transaction reordering in a computer system having unordered sl...

Memory control device with split read for ROM access

Bus transaction reordering in a computer system having unordered sl...

Method and apparatus for serialized interrupt transmission

Deadlock avoidance in a split-bus computer system

Deadlock avoidance in a computer system having unordered slaves

Method and apparatus for dynamic buffer allocation in a bus bridge...

Line data architecture and bus interface circuits and methods for d...

System and method for coordinating access to a bus

Bus transaction reordering using side-band information signals

Bus protocol using separate clocks for arbitration and data transfer

System and method for interleaving memory banks

Dynamic memory refresh controller and method

System and method for performing wake-up operations to a memory

Method and system for improving bus utilization efficiency

Method and system for pipelining bus requests

Bus deadlock avoidance during master split-transactions