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James M. Larnerd
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Port Crane, NY, US
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Patents Grants
last 30 patents
Information
Patent Grant
Method of making circuitized substrate with filled isolation border
Patent number
7,814,649
Issue date
Oct 19, 2010
Endicott Interconnect Technologies, Inc.
John M. Lauffer
H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information
Patent Grant
Information handling system utilizing circuitized substrate with sp...
Patent number
7,491,896
Issue date
Feb 17, 2009
Endicott Interconnect Technologies, Inc.
John M. Lauffer
H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information
Patent Grant
Method of making circuitized substrate with split conductive layer...
Patent number
7,377,033
Issue date
May 27, 2008
Endicott Interconnect Technologies, Inc.
John M. Lauffer
H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information
Patent Grant
Method of providing printed circuit board with conductive holes and...
Patent number
7,348,677
Issue date
Mar 25, 2008
Endicott Interconnect Technologies, Inc.
James M. Larnerd
H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information
Patent Grant
Method of making multilayered printed circuit board with filled con...
Patent number
7,211,289
Issue date
May 1, 2007
Endicott Interconnect Technologies, Inc.
James M. Larnerd
H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information
Patent Grant
Circuitized substrate with split conductive layer, method of making...
Patent number
7,157,646
Issue date
Jan 2, 2007
Endicott Interconnect Technologies, Inc.
John M. Lauffer
H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information
Patent Grant
Circuitized substrate with filled isolation border, method of makin...
Patent number
7,157,647
Issue date
Jan 2, 2007
Endicott Interconnect Technologies, Inc.
John M. Lauffer
H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information
Patent Grant
Circuit board having burr free castellated plated through holes
Patent number
6,483,046
Issue date
Nov 19, 2002
International Business Machines Corporation
David E. Houser
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Information
Patent Grant
Method of making a circuit board having burr free castellated plate...
Patent number
6,105,246
Issue date
Aug 22, 2000
International Business Machines Corporation
David E. Houser
H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information
Patent Grant
Automatic loading mechanism
Patent number
4,979,862
Issue date
Dec 25, 1990
IBM
Richard A. Bartlett
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Information
Patent Grant
Solder leveling method and apparatus
Patent number
4,869,418
Issue date
Sep 26, 1989
International Business Machines Corporation
John P. Simpson
B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information
Patent Grant
Solder leveling method and apparatus
Patent number
4,799,616
Issue date
Jan 24, 1989
International Business Machines Corporation
John P. Simpson
B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Patents Applications
last 30 patents
Information
Patent Application
Information handling system utilizing circuitized substrate with sp...
Publication number
20080117583
Publication date
May 22, 2008
Endicott Interconnect Technologies, Inc.
John M. Lauffer
H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information
Patent Application
Method of making circuitized substrate with split conductive layer...
Publication number
20070144772
Publication date
Jun 28, 2007
Endicott Interconnect Technologies, Inc.
John M. Lauffer
H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information
Patent Application
Method of making circuitized substrate with filled isolation border
Publication number
20060248717
Publication date
Nov 9, 2006
Endicott Interconnect Technologies, Inc.
John M. Lauffer
H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information
Patent Application
Method of providing printed circuit board with conductive holes and...
Publication number
20060183316
Publication date
Aug 17, 2006
Endicott Interconnect Technologies, Inc.
James M. Larnerd
H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information
Patent Application
Circuitized substrate with split conductive layer, method of making...
Publication number
20060000636
Publication date
Jan 5, 2006
Endicott Interconnect Technologies, Inc.
John M. Lauffer
H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information
Patent Application
Circuitized substrate with filled isolation border, method of makin...
Publication number
20060000639
Publication date
Jan 5, 2006
Endicott Interconnect Technologies, Inc.
John M. Lauffer
H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information
Patent Application
Method of providing printed circuit board with conductive holes and...
Publication number
20050136646
Publication date
Jun 23, 2005
Endicott Interconnect Technologies, Inc.
James M. Larnerd
H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR