James McClay

Person

Dudley, MA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method and apparatus for eliminating bit disturbance errors in non-...
- Patent number 11,327,882
- Issue date May 10, 2022
- ALLEGRO MICROSYSTEMS, LLC
- Muhammed Sarwar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for eliminating EEPROM bit-disturb
- Patent number 11,170,858
- Issue date Nov 9, 2021
- ALLEGRO MICROSYSTEMS, LLC
- Muhammad Sarwar
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of multiple gate oxide forming with hard mask
- Patent number 10,916,438
- Issue date Feb 9, 2021
- ALLEGRO MICROSYSTEMS, LLC
- Maxim Klebanov
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
METHOD TO IMPLANT P-TYPE AND/OR N-TYPE RINGS IN A SEMICONDUCTOR DEVICE
- Publication number 20240405124
- Publication date Dec 5, 2024
- ALLEGRO MICROSYSTEMS, LLC
- Yu-Chun Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ELECTROSTATIC DISCHARGE PROTECTION DEVICE INCLUDING PARASITIC MOSFE...
- Publication number 20240170478
- Publication date May 23, 2024
- ALLEGRO MICROSYSTEMS, LLC
- Chung C. Kuo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CIRCUITS HAVING ENHANCED ELECTRICAL ISOLATION
- Publication number 20240120371
- Publication date Apr 11, 2024
- ALLEGRO MICROSYSTEMS, LLC
- James McClay
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FLASH MEMORY CELL STRUCTURE HAVING SEPARATE PROGRAM AND ERASE ELECT...
- Publication number 20230253507
- Publication date Aug 10, 2023
- ALLEGRO MICROSYSTEMS, LLC
- Thomas S. Chung
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND APPARATUS FOR ELIMINATING EEPROM BIT-DISTURB
- Publication number 20210295932
- Publication date Sep 23, 2021
- ALLEGRO MICROSYSTEMS, LLC
- Muhammad Sarwar
- G01 - MEASURING TESTING
Information Patent Application
METHOD AND APPARATUS FOR ELIMINATING BIT DISTURBANCE ERRORS IN NON-...
- Publication number 20210240606
- Publication date Aug 5, 2021
- ALLEGRO MICROSYSTEMS, LLC
- Muhammed Sarwar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD OF MULTIPLE GATE OXIDE FORMING WITH HARD MASK
- Publication number 20200357652
- Publication date Nov 12, 2020
- ALLEGRO MICROSYSTEMS, LLC
- Maxim Klebanov
- H01 - BASIC ELECTRIC ELEMENTS

James McClay

Person

Patents Grantslast 30 patents

Method and apparatus for eliminating bit disturbance errors in non-...

Method and apparatus for eliminating EEPROM bit-disturb

Method of multiple gate oxide forming with hard mask

Patents Applicationslast 30 patents

METHOD TO IMPLANT P-TYPE AND/OR N-TYPE RINGS IN A SEMICONDUCTOR DEVICE

ELECTROSTATIC DISCHARGE PROTECTION DEVICE INCLUDING PARASITIC MOSFE...

CIRCUITS HAVING ENHANCED ELECTRICAL ISOLATION

FLASH MEMORY CELL STRUCTURE HAVING SEPARATE PROGRAM AND ERASE ELECT...

METHOD AND APPARATUS FOR ELIMINATING EEPROM BIT-DISTURB

METHOD AND APPARATUS FOR ELIMINATING BIT DISTURBANCE ERRORS IN NON-...

METHOD OF MULTIPLE GATE OXIDE FORMING WITH HARD MASK