James R. Guajardo

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Georgetown, TX, US

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Patents Grantslast 30 patents

Information Patent Grant
Structure and method to minimize warpage of packaged semiconductor...
- Patent number 9,978,614
- Issue date May 22, 2018
- NXP USA, INC.
- Nishant Lakhera
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Edge coupling of semiconductor dies
- Patent number 9,087,702
- Issue date Jul 21, 2015
- FREESCALE SEMICONDUCTOR, INC.
- Tim V. Pham
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Using an integrated circuit die configuration for package height re...
- Patent number 8,957,510
- Issue date Feb 17, 2015
- FREESCALE SEMICONDUCTOR, INC.
- Tim V. Pham
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
STRUCTURE AND METHOD TO MINIMIZE WARPAGE OF PACKAGED SEMICONDUCTOR...
- Publication number 20160307780
- Publication date Oct 20, 2016
- FREESCALE SEMICONDUCTOR, INC.
- Nishant LAKHERA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRUCTURE AND METHOD TO MINIMIZE WARPAGE OF PACKAGED SEMICONDUCTOR...
- Publication number 20160064299
- Publication date Mar 3, 2016
- NISHANT LAKHERA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
EDGE COUPLING OF SEMICONDUCTOR DIES
- Publication number 20150061097
- Publication date Mar 5, 2015
- FREESCALE SEMICONDUCTOR, INC.
- Tim V. Pham
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
USING AN INTEGRATED CIRCUIT DIE CONFIGURATION FOR PACKAGE HEIGHT RE...
- Publication number 20150008567
- Publication date Jan 8, 2015
- TIM V. PHAM
- H01 - BASIC ELECTRIC ELEMENTS