James R. Harness

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Chandler, AZ, US

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Patents Grantslast 30 patents

Information Patent Grant
Byte aligned redundancy for memory array
- Patent number 6,985,392
- Issue date Jan 10, 2006
- Intel Corporation
- Robert D. Bateman
- G11 - INFORMATION STORAGE
Information Patent Grant
Byte aligned redundancy for memory array
- Patent number 6,831,868
- Issue date Dec 14, 2004
- Intel Corporation
- Robert D. Bateman
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Byte aligned redundancy for memory array
- Publication number 20050024981
- Publication date Feb 3, 2005
- Intel Corporation
- Robert D. Bateman
- G11 - INFORMATION STORAGE
Information Patent Application
Byte aligned redundancy for memory array
- Publication number 20040109360
- Publication date Jun 10, 2004
- Intel Corporation
- Robert D. Bateman
- G11 - INFORMATION STORAGE