James Robert Janesick

Person

Huntington Beach, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
CMOS multi-pinned (MP) pixel
- Patent number 9,287,319
- Issue date Mar 15, 2016
- SRI International
- James Robert Janesick
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Readout transistor circuits for CMOS imagers
- Patent number 9,200,956
- Issue date Dec 1, 2015
- SRI International
- James Robert Janesick
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Ring pixel for CMOS imagers
- Patent number 8,835,999
- Issue date Sep 16, 2014
- SRI International
- James Robert Janesick
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
SOI-based CMOS imagers employing flash gate/chemisorption processing
- Patent number 8,779,481
- Issue date Jul 15, 2014
- SRI International
- James Robert Janesick
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Substrate bias for CMOS imagers
- Patent number 8,592,245
- Issue date Nov 26, 2013
- SRI International
- James Robert Janesick
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
SOI-based CMOS imagers employing flash gate/chemisorption processing
- Patent number 8,389,319
- Issue date Mar 5, 2013
- SRI International
- James Robert Janesick
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Substrate bias for CMOS imagers
- Patent number 8,319,262
- Issue date Nov 27, 2012
- SRI International
- James Robert Janesick
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Image sensor with deep well region and method of fabricating the im...
- Patent number 7,250,325
- Issue date Jul 31, 2007
- Sarnoff Corporation
- James Robert Janesick
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Image sensor with deep well region and method of fabricating the im...
- Patent number 7,166,878
- Issue date Jan 23, 2007
- Sarnoff Corporation
- James Robert Janesick
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Imager cell with pinned transfer gate
- Patent number 6,909,126
- Issue date Jun 21, 2005
- ESS Technology, Inc.
- Jim Janesick
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-mode imager with pinned photo region photoreceptors
- Patent number 6,881,941
- Issue date Apr 19, 2005
- Ess Technology, Inc.
- James Janesick
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-mode imager with pinned photo region photoreceptors
- Patent number 6,765,186
- Issue date Jul 20, 2004
- Ess Technology, Inc.
- James Janesick
- G11 - INFORMATION STORAGE
Information Patent Grant
Imager cell with pinned transfer gate
- Patent number 6,762,441
- Issue date Jul 13, 2004
- Ess Technology, Inc.
- Jim Janesick
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Back side thinned CCD with high speed channel stop
- Patent number 6,369,415
- Issue date Apr 9, 2002
- Pixel Vision, Inc.
- James R. Janesick
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
CCD based optical detector for a confocal microscope
- Patent number 5,844,598
- Issue date Dec 1, 1998
- Pixel Vision, Inc.
- James R. Janesick
- G02 - OPTICS

Patents Applicationslast 30 patents

Information Patent Application
CMOS MULTI-PINNED (MP) PIXEL
- Publication number 20140138748
- Publication date May 22, 2014
- SRI International
- James Robert Janesick
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SOI-BASED CMOS IMAGERS EMPLOYING FLASH GATE/CHEMISORPTION PROCESSING
- Publication number 20130140613
- Publication date Jun 6, 2013
- SRI International
- James Robert Janesick
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SUBSTRATE BIAS FOR CMOS IMAGERS
- Publication number 20130040417
- Publication date Feb 14, 2013
- SRI International
- James Robert Janesick
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
P-PIXEL CMOS IMAGERS USING ULTRA-THIN SILICON ON INSULATOR SUBSTRAT...
- Publication number 20120104464
- Publication date May 3, 2012
- James Robert Janesick
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
READOUT TRANSISTOR CIRCUITS FOR CMOS IMAGERS
- Publication number 20110315854
- Publication date Dec 29, 2011
- James Robert Janesick
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SUBSTRATE BIAS FOR CMOS IMAGERS
- Publication number 20110024808
- Publication date Feb 3, 2011
- James Robert Janesick
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RING PIXEL FOR CMOS IMAGERS
- Publication number 20110024809
- Publication date Feb 3, 2011
- James Robert Janesick
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SOI-BASED CMOS IMAGERS EMPLOYING FLASH GATE/CHEMISORPTION PROCESSING
- Publication number 20110024810
- Publication date Feb 3, 2011
- James Robert Janesick
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Image sensor with deep well region and method of fabricating the im...
- Publication number 20050255625
- Publication date Nov 17, 2005
- James Robert Janesick
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Image sensor with deep well region and method of fabricating the im...
- Publication number 20050139833
- Publication date Jun 30, 2005
- James Robert Janesick
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Multi-mode imager with pinned photo region photoreceptors
- Publication number 20030085339
- Publication date May 8, 2003
- James Janesick
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

James Robert Janesick

Person

Patents Grantslast 30 patents

CMOS multi-pinned (MP) pixel

Readout transistor circuits for CMOS imagers

Ring pixel for CMOS imagers

SOI-based CMOS imagers employing flash gate/chemisorption processing

Substrate bias for CMOS imagers

SOI-based CMOS imagers employing flash gate/chemisorption processing

Substrate bias for CMOS imagers

Image sensor with deep well region and method of fabricating the im...

Image sensor with deep well region and method of fabricating the im...

Imager cell with pinned transfer gate

Multi-mode imager with pinned photo region photoreceptors

Multi-mode imager with pinned photo region photoreceptors

Imager cell with pinned transfer gate

Back side thinned CCD with high speed channel stop

CCD based optical detector for a confocal microscope

Patents Applicationslast 30 patents

CMOS MULTI-PINNED (MP) PIXEL

SOI-BASED CMOS IMAGERS EMPLOYING FLASH GATE/CHEMISORPTION PROCESSING

SUBSTRATE BIAS FOR CMOS IMAGERS

P-PIXEL CMOS IMAGERS USING ULTRA-THIN SILICON ON INSULATOR SUBSTRAT...

READOUT TRANSISTOR CIRCUITS FOR CMOS IMAGERS

SUBSTRATE BIAS FOR CMOS IMAGERS

RING PIXEL FOR CMOS IMAGERS

SOI-BASED CMOS IMAGERS EMPLOYING FLASH GATE/CHEMISORPTION PROCESSING

Image sensor with deep well region and method of fabricating the im...

Image sensor with deep well region and method of fabricating the im...

Multi-mode imager with pinned photo region photoreceptors