James Vinh

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San Jose, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
CMOS circuit with dynamic parasitic net pulldown circuit
- Patent number 8,461,877
- Issue date Jun 11, 2013
- Advanced Micro Devices, Inc.
- Kyle S. Viau
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for reduction of noise sensitivity in dynamic...
- Patent number 6,603,333
- Issue date Aug 5, 2003
- Fujitsu Limited
- James Vinh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for a family of self clocked dynamic circuits
- Patent number 6,407,585
- Issue date Jun 18, 2002
- Fujitsu Ltd.
- James Vinh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
High speed static latch
- Patent number 6,348,824
- Issue date Feb 19, 2002
- Fujitsu, Limited
- Bob Grondalski
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for high speed on-chip signal propagation
- Patent number 6,249,147
- Issue date Jun 19, 2001
- Fujitsu, Ltd.
- James Vinh
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
CMOS CIRCUIT WITH DYNAMIC PARASITIC NET PULLDOWN CIRCUIT
- Publication number 20130002303
- Publication date Jan 3, 2013
- Advanced Micro Devices, Inc.
- Kyle S. Viau
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Method and apparatus for reduction of noise sensitivity in dynamic...
- Publication number 20020067188
- Publication date Jun 6, 2002
- James Vinh
- H03 - BASIC ELECTRONIC CIRCUITRY