James Yong Meng Lee

Person

Singapore, SG

People

Patents Grantslast 30 patents

Information Patent Grant
Clamp
- Patent number D679573
- Issue date Apr 9, 2013
- Opium Co Pte Ltd
- James Lee
- D08 - Tools and hardware
Information Patent Grant
Integrated circuit system employing selective epitaxial growth tech...
- Patent number 7,795,680
- Issue date Sep 14, 2010
- Chartered Semiconductor Manufacturing Ltd.
- Huang Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process flow for a performance enhanced MOSFET with self-aligned, r...
- Patent number 7,091,092
- Issue date Aug 15, 2006
- Chartered Semiconductor Manufacturing Ltd.
- Sneedharan Pillai Sneelal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to form a self-aligned CMOS inverter using vertical device i...
- Patent number 6,747,314
- Issue date Jun 8, 2004
- Chartered Semiconductor Manufacturing Ltd.
- Ravi Sundaresan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming variable-K gate dielectric
- Patent number 6,709,934
- Issue date Mar 23, 2004
- Chartered Semiconductor Manufacturing Ltd.
- James Yong Meng Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to form self-aligned source/drain CMOS device on insulated s...
- Patent number 6,541,327
- Issue date Apr 1, 2003
- Chartered Semiconductor Manufacturing Ltd.
- Lap Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of patterning gate electrode with ultra-thin gate dielectric
- Patent number 6,475,916
- Issue date Nov 5, 2002
- Chartered Semiconductor Manufacturing Ltd.
- James Yong Meng Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to form an air-gap under the edges of a gate electrode by us...
- Patent number 6,468,877
- Issue date Oct 22, 2002
- Chartered Semiconductor Manufacturing Ltd.
- Yelehanka Ramachandramurthy Pradeep
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to form an inverted staircase STI structure by etch-depositi...
- Patent number 6,461,887
- Issue date Oct 8, 2002
- Chartered Semiconductor Manufacturing Ltd.
- Yelehanka Ramachandramurthy Pradeep
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming ultra-thin buffer oxide layers for gate dielectrics
- Patent number 6,458,717
- Issue date Oct 1, 2002
- Chartered Semiconductor Manufacturing Ltd.
- James Yong Meng Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to form very high mobility vertical channel transistor by se...
- Patent number 6,455,377
- Issue date Sep 24, 2002
- Chartered Semiconductor Manufacturing Ltd.
- Jia Zhen Zheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to form a vertical transistor by selective epitaxial growth...
- Patent number 6,440,800
- Issue date Aug 27, 2002
- Chartered Semiconductor Manufacturing Ltd.
- James Yong Meng Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to control the channel length of a vertical transistor by fi...
- Patent number 6,436,770
- Issue date Aug 20, 2002
- Chartered Semiconductor Manufacturing Ltd.
- Ying Keung Leung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming variable-K gate dielectric
- Patent number 6,436,774
- Issue date Aug 20, 2002
- Chartered Semiconductor Manufacturing Ltd.
- James Yong Meng Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating a self aligned S/D CMOS device on insulated...
- Patent number 6,417,054
- Issue date Jul 9, 2002
- Chartered Semiconductor Manufacturing Ltd.
- Jia Zhen Zheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to form low-overlap-capacitance transistors by forming micro...
- Patent number 6,417,056
- Issue date Jul 9, 2002
- Chartered Semiconductor Manufacturing Ltd.
- Elgin Quek
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming a transistor gate dielectric with high-K and low...
- Patent number 6,406,945
- Issue date Jun 18, 2002
- Chartered Semiconductor Manufacturing Ltd.
- James Yong Meng Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to achieve STI planarization
- Patent number 6,403,484
- Issue date Jun 11, 2002
- Chartered Semiconductor Manufacturing Ltd.
- Victor Seng Keong Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process flow for a performance enhanced MOSFET with self-aligned, r...
- Patent number 6,391,720
- Issue date May 21, 2002
- Chartered Semiconductor Manufacturing Ltd.
- Sneedharan Pillai Sneelal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to form a recessed source drain on a trench side wall with a...
- Patent number 6,380,088
- Issue date Apr 30, 2002
- Chartered Semiconductor Manufacturing, Inc.
- Lap Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to form a balloon shaped STI using a micro machining techniq...
- Patent number 6,313,008
- Issue date Nov 6, 2001
- Chartered Semiconductor Manufacturing Inc.
- Ying Keung Leung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to form an elevated S/D CMOS device by contacting S/D throug...
- Patent number 6,306,714
- Issue date Oct 23, 2001
- Chartered Semiconductor Manufacturing Inc.
- Yang Pan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of patterning gate electrodes with high K gate dielectrics
- Patent number 6,306,741
- Issue date Oct 23, 2001
- Chartered Semiconductor Manufacturing, Inc.
- James Yong Meng Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to form smaller channel with CMOS device by isotropic etchin...
- Patent number 6,306,715
- Issue date Oct 23, 2001
- Chartered Semiconductor Manufacturing Ltd.
- Lap Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to form self-aligned elevated source/drain by selective remo...
- Patent number 6,303,449
- Issue date Oct 16, 2001
- Chartered Semiconductor Manufacturing Inc.
- Yang Pan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to form transistors with multiple threshold voltages (VT) us...
- Patent number 6,300,177
- Issue date Oct 9, 2001
- Chartered Semiconductor Manufacturing Inc.
- Ravi Sundaresan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Shallow trench isolation process
- Patent number 6,197,691
- Issue date Mar 6, 2001
- Chartered Semiconductor Manufacturing Ltd.
- James Yong Meng Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Determination of oxidant or reductant concentration by the spectrop...
- Patent number 5,451,526
- Issue date Sep 19, 1995
- National University of Singapore
- Cheng Q. Cui
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
CLAMP FOR A PIPE ASSEMBLY, AN ENGAGEMENT DEVICE FOR THE CLAMP, AND...
- Publication number 20130119656
- Publication date May 16, 2013
- Opium Co Pte Ltd.
- James Lee
- F16 - ENGINEERING ELEMENTS AND UNITS GENERAL MEASURES FOR PRODUCING AND MAINT...
Information Patent Application
INTEGRATED CIRCUIT SYSTEM EMPLOYING SELECTIVE EPITAXIAL GROWTH TECH...
- Publication number 20090146262
- Publication date Jun 11, 2009
- Chartered Semiconductor Manufacturing LTD.
- Huang Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Application of single exposure alternating aperture phase shift mas...
- Publication number 20060194397
- Publication date Aug 31, 2006
- Chartered Semiconductor Manufacturing Ltd.
- Lay Cheng Choo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for forming variable-K gate dielectric
- Publication number 20020173106
- Publication date Nov 21, 2002
- Chartered Semiconductor Manufacturing Ltd.
- James Yong Meng Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for forming variable-K gate dielectric
- Publication number 20020100947
- Publication date Aug 1, 2002
- Chartered Semiconductor Manufacturing Inc.
- James Yong Meng Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method to form a vertical transistor by selective epitaxial growth...
- Publication number 20020102784
- Publication date Aug 1, 2002
- Chartered Semiconductor Manufacturing Ltd.
- James Yong Meng Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Process flow for a performance enhanced MOSFET with self-aligned, r...
- Publication number 20020094622
- Publication date Jul 18, 2002
- Chartered Semiconductor Manufacturing Ltd.
- Sneedharan Pillai Sneelal
- H01 - BASIC ELECTRIC ELEMENTS

James Yong Meng Lee

Person

Patents Grantslast 30 patents

Clamp

Integrated circuit system employing selective epitaxial growth tech...

Process flow for a performance enhanced MOSFET with self-aligned, r...

Method to form a self-aligned CMOS inverter using vertical device i...

Method for forming variable-K gate dielectric

Method to form self-aligned source/drain CMOS device on insulated s...

Method of patterning gate electrode with ultra-thin gate dielectric

Method to form an air-gap under the edges of a gate electrode by us...

Method to form an inverted staircase STI structure by etch-depositi...

Methods of forming ultra-thin buffer oxide layers for gate dielectrics

Method to form very high mobility vertical channel transistor by se...

Method to form a vertical transistor by selective epitaxial growth...

Method to control the channel length of a vertical transistor by fi...

Method for forming variable-K gate dielectric

Method for fabricating a self aligned S/D CMOS device on insulated...

Method to form low-overlap-capacitance transistors by forming micro...

Method for forming a transistor gate dielectric with high-K and low...

Method to achieve STI planarization

Process flow for a performance enhanced MOSFET with self-aligned, r...

Method to form a recessed source drain on a trench side wall with a...

Method to form a balloon shaped STI using a micro machining techniq...

Method to form an elevated S/D CMOS device by contacting S/D throug...

Method of patterning gate electrodes with high K gate dielectrics

Method to form smaller channel with CMOS device by isotropic etchin...

Method to form self-aligned elevated source/drain by selective remo...

Method to form transistors with multiple threshold voltages (VT) us...

Shallow trench isolation process

Determination of oxidant or reductant concentration by the spectrop...

Patents Applicationslast 30 patents

CLAMP FOR A PIPE ASSEMBLY, AN ENGAGEMENT DEVICE FOR THE CLAMP, AND...

INTEGRATED CIRCUIT SYSTEM EMPLOYING SELECTIVE EPITAXIAL GROWTH TECH...

Application of single exposure alternating aperture phase shift mas...

Method for forming variable-K gate dielectric

Method for forming variable-K gate dielectric

Method to form a vertical transistor by selective epitaxial growth...

Process flow for a performance enhanced MOSFET with self-aligned, r...