Jan-Peter Schat

Person

Hamburg, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Apparatus to cryptographically provide a digital output signal as a...
- Patent number 12,047,489
- Issue date Jul 23, 2024
- NXP B.V.
- Jan-Peter Schat
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Secure key generation using a chaotic oscillator
- Patent number 12,035,133
- Issue date Jul 9, 2024
- NXP B.V.
- Jan-Peter Schat
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Communications system
- Patent number 11,943,015
- Issue date Mar 26, 2024
- NXP B.V.
- Jan-Peter Schat
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Integrated circuit device die with wafer/package detection circuit
- Patent number 11,842,934
- Issue date Dec 12, 2023
- NXP B.V.
- Jan-Peter Schat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Securing cryptographic operations from side channel attacks using a...
- Patent number 11,762,993
- Issue date Sep 19, 2023
- NXP B.V.
- Jan-Peter Schat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for triggering and detecting hardware trojans
- Patent number 11,693,966
- Issue date Jul 4, 2023
- NXP B.V.
- Jan-Peter Schat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Wireless communication device and method for spying counter measures
- Patent number 11,689,932
- Issue date Jun 27, 2023
- NXP B.V.
- Jan-Peter Schat
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Test apparatus and method for testing a semiconductor device
- Patent number 11,635,461
- Issue date Apr 25, 2023
- NXP B.V.
- Abdellatif Zanati
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for detecting system-level trojans and an integrated circui...
- Patent number 11,586,728
- Issue date Feb 21, 2023
- NXP B.V.
- Jan-Peter Schat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses involving calibration of input offset voltage and signa...
- Patent number 11,585,849
- Issue date Feb 21, 2023
- NXP USA, INC.
- Tao Chen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Combined ECC and transparent memory test for memory fault detection
- Patent number 11,557,365
- Issue date Jan 17, 2023
- NXP B.V.
- Jan-Peter Schat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory testing
- Patent number 11,532,374
- Issue date Dec 20, 2022
- NXP B.V.
- Jan-Peter Schat
- G11 - INFORMATION STORAGE
Information Patent Grant
Vehicle access based on RF digests/backgrounds
- Patent number 11,518,343
- Issue date Dec 6, 2022
- NXP B.V.
- Jan-Peter Schat
- B60 - VEHICLES IN GENERAL
Information Patent Grant
PLL jitter detection
- Patent number 11,522,551
- Issue date Dec 6, 2022
- NXP B.V.
- Jan-Peter Schat
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
System and method for obfuscating opcode commands in a semiconducto...
- Patent number 11,509,461
- Issue date Nov 22, 2022
- NXP B.V.
- Jan-Peter Schat
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Enabling secure internet transactions in an unsecure home using imm...
- Patent number 11,502,843
- Issue date Nov 15, 2022
- NXP B.V.
- Jan-Peter Schat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods involving a circuit for detecting a hardwar...
- Patent number 11,449,611
- Issue date Sep 20, 2022
- NXP B.V.
- Jan-Peter Schat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Testing a memory which includes conservative reversible logic
- Patent number 11,435,940
- Issue date Sep 6, 2022
- NXP B.V.
- Jan-Peter Schat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus comprising a semiconductor device and test app...
- Patent number 11,415,626
- Issue date Aug 16, 2022
- NXP B.V.
- Jan-Peter Schat
- G01 - MEASURING TESTING
Information Patent Grant
Integrated circuit device with integrated fault monitoring system
- Patent number 11,416,378
- Issue date Aug 16, 2022
- NXP B.V.
- Jan-Peter Schat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for performing netlist obfuscation for a semicond...
- Patent number 11,411,749
- Issue date Aug 9, 2022
- NXP B.V.
- Jan-Peter Schat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus for prediction of failure of a functional circuit
- Patent number 11,378,617
- Issue date Jul 5, 2022
- NXP B.V.
- Michael Doescher
- G01 - MEASURING TESTING
Information Patent Grant
System and method for generating and authenticating a physically un...
- Patent number 11,329,834
- Issue date May 10, 2022
- NXP B.V.
- Jan-Peter Schat
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Apparatuses and methods involving authentication of radar-based dig...
- Patent number 11,271,722
- Issue date Mar 8, 2022
- NXP B.V.
- Jan-Peter Schat
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Built-in self-test for a radar unit receiver and method therefor
- Patent number 11,215,694
- Issue date Jan 4, 2022
- NXP B.V.
- Jan-Peter Schat
- G01 - MEASURING TESTING
Information Patent Grant
Detection of a cold boot memory attack in a data processing system
- Patent number 11,204,832
- Issue date Dec 21, 2021
- NXP B.V.
- Jan-Peter Schat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for detecting an attack on a physically unclonabl...
- Patent number 11,171,793
- Issue date Nov 9, 2021
- NXP B.V.
- Jan-Peter Schat
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Data transmission code and interface
- Patent number 11,169,952
- Issue date Nov 9, 2021
- NXP B.V.
- Jan-Peter Schat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Logic and flip-flop circuit timing margins controlled based on scan...
- Patent number 11,146,252
- Issue date Oct 12, 2021
- NXP B.V.
- Jan-Peter Schat
- G01 - MEASURING TESTING
Information Patent Grant
High data rate transmission using minimum energy coding with ultra...
- Patent number 11,146,433
- Issue date Oct 12, 2021
- NXP B.V.
- Jan-Peter Schat
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
TEST SYSTEM FOR DETECTING FAULTS IN MULTIPLE DEVICES OF THE SAME TYPE
- Publication number 20240219453
- Publication date Jul 4, 2024
- NXP B.V.
- Jan-Peter Schat
- G01 - MEASURING TESTING
Information Patent Application
SECURING CRYPTOGRAPHIC OPERATIONS FROM SIDE CHANNEL ATTACKS USING A...
- Publication number 20220327209
- Publication date Oct 13, 2022
- NXP B.V.
- Jan-Peter Schat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SECURE KEY GENERATION USING A CHAOTIC OSCILLATOR
- Publication number 20220322082
- Publication date Oct 6, 2022
- NXP B.V.
- Jan-Peter Schat
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
TESTING A MEMORY WHICH INCLUDES CONSERVATIVE REVERSIBLE LOGIC
- Publication number 20220244881
- Publication date Aug 4, 2022
- NXP B.V.
- Jan-Peter Schat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FEEDBACK SYSTEM MONITORING
- Publication number 20220187423
- Publication date Jun 16, 2022
- NXP B.V.
- Ulrich Moehlmann
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
APPARATUS
- Publication number 20220158820
- Publication date May 19, 2022
- NXP B.V.
- Jan-Peter Schat
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
PLL JITTER DETECTION
- Publication number 20220158644
- Publication date May 19, 2022
- NXP B.V.
- Jan-Peter Schat
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
COMMUNICATIONS SYSTEM
- Publication number 20220140867
- Publication date May 5, 2022
- NXP B.V.
- Jan-Peter Schat
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
MEMORY TESTING
- Publication number 20210366566
- Publication date Nov 25, 2021
- NXP B.V.
- Jan-Peter Schat
- G11 - INFORMATION STORAGE
Information Patent Application
SYSTEM AND METHOD FOR OBFUSCATING OPCODE COMMANDS IN A SEMICONDUCTO...
- Publication number 20210351922
- Publication date Nov 11, 2021
- NXP B.V.
- Jan-Peter Schat
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
DETECTION OF A COLD BOOT MEMORY ATTACK IN A DATA PROCESSING SYSTEM
- Publication number 20210311823
- Publication date Oct 7, 2021
- NXP B.V.
- Jan-Peter SCHAT
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
High Data Rate Transmission Using Minimum Energy Coding With Ultra...
- Publication number 20210288849
- Publication date Sep 16, 2021
- NXP B.V.
- Jan-Peter Schat
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
LOGIC AND FLIP-FLOP CIRCUIT TIMING MARGINS CONTROLLED BASED ON SCAN...
- Publication number 20210265986
- Publication date Aug 26, 2021
- NXP B.V.
- Jan-Peter Schat
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SYSTEM AND METHOD FOR GENERATING AND AUTHENTICATING A PHYSICALLY UN...
- Publication number 20210250188
- Publication date Aug 12, 2021
- NXP. B.V.
- Jan-Peter Schat
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
VEHICLE ACCESS BASED ON RF DIGESTS/BACKGROUNDS
- Publication number 20210237688
- Publication date Aug 5, 2021
- NXP B.V.
- JAN-PETER SCHAT
- B60 - VEHICLES IN GENERAL
Information Patent Application
METHOD AND APPARATUS COMPRISING A SEMICONDUCTOR DEVICE AND TEST APP...
- Publication number 20210239754
- Publication date Aug 5, 2021
- NXP B.V.
- Jan-Peter Schat
- G01 - MEASURING TESTING
Information Patent Application
SYSTEM AND METHOD FOR PERFORMING NETLIST OBFUSCATION FOR A SEMICOND...
- Publication number 20210243041
- Publication date Aug 5, 2021
- NXP. B.V.
- Jan-Peter Schat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TEST APPARATUS AND METHOD FOR TESTING A SEMICONDUCTOR DEVICE
- Publication number 20210239753
- Publication date Aug 5, 2021
- NXP B.V.
- Abdellatif Zanati
- G01 - MEASURING TESTING
Information Patent Application
WIRELESS COMMUNICATION DEVICE AND METHOD FOR SPYING COUNTER MEASURES
- Publication number 20210120421
- Publication date Apr 22, 2021
- NXP B.V.
- Jan-Peter Schat
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
METHOD AND SYSTEM FOR DETECTING AN ATTACK ON A PHYSICALLY UNCLONABL...
- Publication number 20210099314
- Publication date Apr 1, 2021
- NXP B.V.
- Jan-Peter Schat
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SYSTEM AND METHOD FOR TRIGGERING AND DETECTING HARDWARE TROJANS
- Publication number 20210049266
- Publication date Feb 18, 2021
- NXP. B.V.
- Jan-Peter SCHAT
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Preventing and Detecting Integrated Circuit Theft and Counterfeiting
- Publication number 20210035923
- Publication date Feb 4, 2021
- NXP B.V.
- Jan-Peter Schat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES INVOLVING CALIBRATION OF INPUT OFFSET VOLTAGE AND SIGNA...
- Publication number 20210003633
- Publication date Jan 7, 2021
- NXP USA, Inc.
- Tao Chen
- G01 - MEASURING TESTING
Information Patent Application
METHODS FOR DETECTING SYSTEM-LEVEL TROJANS AND AN INTEGRATED CIRCUI...
- Publication number 20200387601
- Publication date Dec 10, 2020
- NXP B.V.
- Jan-Peter SCHAT
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND METHODS INVOLVING A CIRCUIT FOR DETECTING A HARDWAR...
- Publication number 20200372152
- Publication date Nov 26, 2020
- NXP B.V.
- Jan-Peter SCHAT
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND METHODS INVOLVING AUTHENTICATION OF RADAR-BASED DIG...
- Publication number 20200358596
- Publication date Nov 12, 2020
- NXP B.V.
- Jan-Peter Schat
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
DATA TRANSMISSION CODE AND INTERFACE
- Publication number 20200349988
- Publication date Nov 5, 2020
- NXP B.V.
- Jan-Peter Schat
- G01 - MEASURING TESTING
Information Patent Application
DATA TRANSMISSION CODE AND INTERFACE
- Publication number 20200341937
- Publication date Oct 29, 2020
- NXP B.V.
- Jan-Peter Schat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ENABLING SECURE INTERNET TRANSACTIONS IN AN UNSECURE HOME USING IMM...
- Publication number 20200213119
- Publication date Jul 2, 2020
- NXP B.V.
- Jan-Peter Schat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TEST SYSTEM WITH EMBEDDED TESTER
- Publication number 20200174070
- Publication date Jun 4, 2020
- NXP B.V.
- Jan-Peter SCHAT
- G01 - MEASURING TESTING

Jan-Peter Schat

Person

Patents Grantslast 30 patents

Apparatus to cryptographically provide a digital output signal as a...

Secure key generation using a chaotic oscillator

Communications system

Integrated circuit device die with wafer/package detection circuit

Securing cryptographic operations from side channel attacks using a...

System and method for triggering and detecting hardware trojans

Wireless communication device and method for spying counter measures

Test apparatus and method for testing a semiconductor device

Methods for detecting system-level trojans and an integrated circui...

Apparatuses involving calibration of input offset voltage and signa...

Combined ECC and transparent memory test for memory fault detection

Memory testing

Vehicle access based on RF digests/backgrounds

PLL jitter detection

System and method for obfuscating opcode commands in a semiconducto...

Enabling secure internet transactions in an unsecure home using imm...

Apparatuses and methods involving a circuit for detecting a hardwar...

Testing a memory which includes conservative reversible logic

Method and apparatus comprising a semiconductor device and test app...

Integrated circuit device with integrated fault monitoring system

System and method for performing netlist obfuscation for a semicond...

Apparatus for prediction of failure of a functional circuit

System and method for generating and authenticating a physically un...

Apparatuses and methods involving authentication of radar-based dig...

Built-in self-test for a radar unit receiver and method therefor

Detection of a cold boot memory attack in a data processing system

Method and system for detecting an attack on a physically unclonabl...

Data transmission code and interface

Logic and flip-flop circuit timing margins controlled based on scan...

High data rate transmission using minimum energy coding with ultra...

Patents Applicationslast 30 patents

TEST SYSTEM FOR DETECTING FAULTS IN MULTIPLE DEVICES OF THE SAME TYPE

SECURING CRYPTOGRAPHIC OPERATIONS FROM SIDE CHANNEL ATTACKS USING A...

SECURE KEY GENERATION USING A CHAOTIC OSCILLATOR

TESTING A MEMORY WHICH INCLUDES CONSERVATIVE REVERSIBLE LOGIC

FEEDBACK SYSTEM MONITORING

APPARATUS

PLL JITTER DETECTION

COMMUNICATIONS SYSTEM

MEMORY TESTING

SYSTEM AND METHOD FOR OBFUSCATING OPCODE COMMANDS IN A SEMICONDUCTO...

DETECTION OF A COLD BOOT MEMORY ATTACK IN A DATA PROCESSING SYSTEM

High Data Rate Transmission Using Minimum Energy Coding With Ultra...

LOGIC AND FLIP-FLOP CIRCUIT TIMING MARGINS CONTROLLED BASED ON SCAN...

SYSTEM AND METHOD FOR GENERATING AND AUTHENTICATING A PHYSICALLY UN...

VEHICLE ACCESS BASED ON RF DIGESTS/BACKGROUNDS

METHOD AND APPARATUS COMPRISING A SEMICONDUCTOR DEVICE AND TEST APP...

SYSTEM AND METHOD FOR PERFORMING NETLIST OBFUSCATION FOR A SEMICOND...

TEST APPARATUS AND METHOD FOR TESTING A SEMICONDUCTOR DEVICE

WIRELESS COMMUNICATION DEVICE AND METHOD FOR SPYING COUNTER MEASURES

METHOD AND SYSTEM FOR DETECTING AN ATTACK ON A PHYSICALLY UNCLONABL...

SYSTEM AND METHOD FOR TRIGGERING AND DETECTING HARDWARE TROJANS

Preventing and Detecting Integrated Circuit Theft and Counterfeiting

APPARATUSES INVOLVING CALIBRATION OF INPUT OFFSET VOLTAGE AND SIGNA...

METHODS FOR DETECTING SYSTEM-LEVEL TROJANS AND AN INTEGRATED CIRCUI...

APPARATUSES AND METHODS INVOLVING A CIRCUIT FOR DETECTING A HARDWAR...

APPARATUSES AND METHODS INVOLVING AUTHENTICATION OF RADAR-BASED DIG...

DATA TRANSMISSION CODE AND INTERFACE

DATA TRANSMISSION CODE AND INTERFACE

ENABLING SECURE INTERNET TRANSACTIONS IN AN UNSECURE HOME USING IMM...

TEST SYSTEM WITH EMBEDDED TESTER