Jason J. Moore

Person

Albuquerque, NM, US

People

Patents Grantslast 30 patents

Information Patent Grant
Protection against differential power analysis attacks involving in...
- Patent number 11,582,021
- Issue date Feb 14, 2023
- Xilinx, Inc.
- James D. Wesselkamper
- G11 - INFORMATION STORAGE
Information Patent Grant
Mixed storage of data fields
- Patent number 11,379,580
- Issue date Jul 5, 2022
- Xilinx, Inc.
- James D. Wesselkamper
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System-on-chip having secure debug mode
- Patent number 11,280,829
- Issue date Mar 22, 2022
- XLNX, INC.
- Ramakrishna G. Poolla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efuse bank and associated anchor bits
- Patent number 10,978,167
- Issue date Apr 13, 2021
- Xilinx, Inc.
- James D. Wesselkamper
- G11 - INFORMATION STORAGE
Information Patent Grant
Asymmetric protection of circuit designs
- Patent number 10,776,522
- Issue date Sep 15, 2020
- Xilinx, Inc.
- Steven E. McNeil
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Ring oscillator for temperature or voltage sensing
- Patent number 10,288,496
- Issue date May 14, 2019
- Xilinx, Inc.
- James D. Wesselkamper
- G01 - MEASURING TESTING
Information Patent Grant
Protection of designs for electronic systems
- Patent number 9,530,022
- Issue date Dec 27, 2016
- Xilinx, Inc.
- Jason J. Moore
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Authentication using public keys and session keys
- Patent number 9,270,469
- Issue date Feb 23, 2016
- Xilinx, Inc.
- Jason J. Moore
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Secured booting of a field programmable system-on-chip including au...
- Patent number 9,230,112
- Issue date Jan 5, 2016
- Xilinx, Inc.
- Edward S. Peterson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable integrated circuit with DPA-resistant decryption
- Patent number 9,218,505
- Issue date Dec 22, 2015
- Xilinx, Inc.
- James D. Wesselkamper
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Image file generation and loading
- Patent number 9,165,143
- Issue date Oct 20, 2015
- Xilinx, Inc.
- Lester S. Sanders
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for restricting the use of integrated circuits
- Patent number 8,983,073
- Issue date Mar 17, 2015
- Xilinx, Inc.
- Edward S. Peterson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuit for and method of enabling communication of cryptographic data
- Patent number 8,713,327
- Issue date Apr 29, 2014
- Xilinx, Inc.
- Edward S. Peterson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and integrated circuit for protecting against differential p...
- Patent number 8,539,254
- Issue date Sep 17, 2013
- Xilinx, Inc.
- Brendan K. Bridgford
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and integrated circuit for secure encryption and decryption
- Patent number 8,379,850
- Issue date Feb 19, 2013
- Xilinx, Inc.
- Brendan K. Bridgford
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Verification of logic core implementation
- Patent number 8,286,113
- Issue date Oct 9, 2012
- Xilinx, Inc.
- Brendan K. Bridgford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Isolation verification within integrated circuits
- Patent number 7,949,974
- Issue date May 24, 2011
- Xilinx, Inc.
- Jason J. Moore
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuit for and method of implementing a plurality of circuits on a...
- Patent number 7,408,381
- Issue date Aug 5, 2008
- Xilinx, Inc.
- Saar Drimer
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
MULTI-DIE PHYSICALLY UNCLONABLE FUNCTION ENTROPY SOURCE
- Publication number 20240413099
- Publication date Dec 12, 2024
- Xilinx, Inc.
- James David Wesselkamper
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF-AUTHENTICATION OF DATA STORED OFF-CHIP
- Publication number 20240406001
- Publication date Dec 5, 2024
- Xilinx, Inc.
- James David Wesselkamper
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
INTEGRATED CIRCUIT PROTECTION USING STACKED DIES
- Publication number 20240163092
- Publication date May 16, 2024
- Xilinx, Inc.
- James D. WESSELKAMPER
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SECURE SHELL AND ROLE ISOLATION FOR MULTI-TENANT COMPUTE
- Publication number 20230328045
- Publication date Oct 12, 2023
- Xilinx, Inc.
- Jaideep DASTIDAR
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
AUTHENTICATION USING PUBLIC KEYS AND SESSION KEYS
- Publication number 20150236856
- Publication date Aug 20, 2015
- Xilinx, Inc.
- Jason J. Moore
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Jason J. Moore

Person

Patents Grantslast 30 patents

Protection against differential power analysis attacks involving in...

Mixed storage of data fields

System-on-chip having secure debug mode

Efuse bank and associated anchor bits

Asymmetric protection of circuit designs

Ring oscillator for temperature or voltage sensing

Protection of designs for electronic systems

Authentication using public keys and session keys

Secured booting of a field programmable system-on-chip including au...

Programmable integrated circuit with DPA-resistant decryption

Image file generation and loading

Method and apparatus for restricting the use of integrated circuits

Circuit for and method of enabling communication of cryptographic data

Method and integrated circuit for protecting against differential p...

Method and integrated circuit for secure encryption and decryption

Verification of logic core implementation

Isolation verification within integrated circuits

Circuit for and method of implementing a plurality of circuits on a...

Patents Applicationslast 30 patents

MULTI-DIE PHYSICALLY UNCLONABLE FUNCTION ENTROPY SOURCE

SELF-AUTHENTICATION OF DATA STORED OFF-CHIP

INTEGRATED CIRCUIT PROTECTION USING STACKED DIES

SECURE SHELL AND ROLE ISOLATION FOR MULTI-TENANT COMPUTE

AUTHENTICATION USING PUBLIC KEYS AND SESSION KEYS