Jason Messier

Person

Boston, MA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Test system supporting reverse compliance
- Patent number 11,415,623
- Issue date Aug 16, 2022
- Teradyne, Inc.
- Jason A. Messier
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Controlling power dissipation in an output stage of a test channel
- Patent number 11,221,361
- Issue date Jan 11, 2022
- Teradyne, Inc.
- Jason A. Messier
- G01 - MEASURING TESTING
Information Patent Grant
Identifying potentially-defective picture elements in an active-mat...
- Patent number 10,615,230
- Issue date Apr 7, 2020
- Teradyne, Inc.
- Jason A. Messier
- G09 - EDUCATION CRYPTOGRAPHY DISPLAY ADVERTISING SEALS
Information Patent Grant
Device and method to reduce simultaneous switching noise
- Patent number 7,523,238
- Issue date Apr 21, 2009
- Teradyne, Inc.
- Jason Messier
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
DDS circuit with arbitrary frequency control clock
- Patent number 7,336,748
- Issue date Feb 26, 2008
- Teradyne, Inc.
- Jason Messier
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High resolution synthesizer with improved signal purity
- Patent number 7,327,816
- Issue date Feb 5, 2008
- Teradyne Inc.
- Jason Messier
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
CONTROLLING POWER DISSIPATION IN AN OUTPUT STAGE OF A TEST CHANNEL
- Publication number 20210063474
- Publication date Mar 4, 2021
- Teradyne, Inc.
- Jason A. Messier
- G01 - MEASURING TESTING
Information Patent Application
TEST SYSTEM SUPPORTING REVERSE COMPLIANCE
- Publication number 20200309849
- Publication date Oct 1, 2020
- Teradyne, Inc.
- Jason A. Messier
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
IDENTIFYING POTENTIALLY-DEFECTIVE PICTURE ELEMENTS IN AN ACTIVE-MAT...
- Publication number 20190140032
- Publication date May 9, 2019
- Teradyne, Inc.
- Jason A. Messier
- G09 - EDUCATION CRYPTOGRAPHY DISPLAY ADVERTISING SEALS
Information Patent Application
DEVICE AND METHOD TO REDUCE SIMULTANEOUS SWITCHING NOISE
- Publication number 20090168575
- Publication date Jul 2, 2009
- Teradyne, Inc.
- Jason Messier
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Device and method to reduce simultaneous switching noise
- Publication number 20070005282
- Publication date Jan 4, 2007
- Jason Messier
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
High resolution synthesizer with improved signal purity
- Publication number 20050135524
- Publication date Jun 23, 2005
- Teradyne, Inc.
- Jason Messier
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DDS circuit with arbitrary frequency control clock
- Publication number 20050135525
- Publication date Jun 23, 2005
- Teradyne, Inc.
- Jason Messier
- G06 - COMPUTING CALCULATING COUNTING

Jason Messier

Person

Patents Grantslast 30 patents

Test system supporting reverse compliance

Controlling power dissipation in an output stage of a test channel

Identifying potentially-defective picture elements in an active-mat...

Device and method to reduce simultaneous switching noise

DDS circuit with arbitrary frequency control clock

High resolution synthesizer with improved signal purity

Patents Applicationslast 30 patents

CONTROLLING POWER DISSIPATION IN AN OUTPUT STAGE OF A TEST CHANNEL

TEST SYSTEM SUPPORTING REVERSE COMPLIANCE

IDENTIFYING POTENTIALLY-DEFECTIVE PICTURE ELEMENTS IN AN ACTIVE-MAT...

DEVICE AND METHOD TO REDUCE SIMULTANEOUS SWITCHING NOISE

Device and method to reduce simultaneous switching noise

High resolution synthesizer with improved signal purity

DDS circuit with arbitrary frequency control clock