Jau-Jiun CHEN

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Thermal chamber with improved thermal uniformity
- Patent number 11,978,646
- Issue date May 7, 2024
- Applied Materials, Inc.
- Dongming Iu
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Electrostatic discharge protection circuit having high allowable po...
- Patent number 9,172,241
- Issue date Oct 27, 2015
- NVIDIA Corporation
- Jau-Wen Chen
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
I/O and power ESD protection circuits by enhancing substrate-bias i...
- Patent number 8,269,280
- Issue date Sep 18, 2012
- LSI Corporation
- Jau-Wen Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
I/O and power ESD protection circuits by enhancing substrate-bias i...
- Patent number 7,948,036
- Issue date May 24, 2011
- LSI Corporation
- Jau-Wen Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Circuit protection system
- Patent number 7,777,996
- Issue date Aug 17, 2010
- LSI Corporation
- William M. Loh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Design of silicon-controlled rectifier by considering electrostatic...
- Patent number 7,763,908
- Issue date Jul 27, 2010
- LSI Corporation
- Jau-Wen Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
I/O and power ESD protection circuits by enhancing substrate-bias i...
- Patent number 7,582,938
- Issue date Sep 1, 2009
- LSI Corporation
- Jau-Wen Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electrostatic discharge series protection
- Patent number 7,551,414
- Issue date Jun 23, 2009
- LSI Corporation
- William M. Loh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bias for electrostatic discharge protection
- Patent number 7,379,281
- Issue date May 27, 2008
- LSI Logic Corporation
- William M. Loh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electrostatic discharge testing
- Patent number 7,375,543
- Issue date May 20, 2008
- LSI Corporation
- Choshu Ito
- G01 - MEASURING TESTING
Information Patent Grant
Optimization of NMOS drivers using self-ballasting ESD protection t...
- Patent number 7,317,228
- Issue date Jan 8, 2008
- LSI Logic Corporation
- Jau-Wen Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Implantation method to improve ESD robustness of thick gate-oxide g...
- Patent number 7,119,405
- Issue date Oct 10, 2006
- LSI Logic Corporation
- Jau-Wen Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Substrate-biased I/O and power ESD protection circuits in deep-subm...
- Patent number 6,979,869
- Issue date Dec 27, 2005
- LSI Logic Corporation
- Jau-Wen Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Input and power protection circuit implemented in a complementary m...
- Patent number 6,347,026
- Issue date Feb 12, 2002
- LSI Logic Corporation
- Roberto Sung
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
THERMAL CHAMBER WITH IMPROVED THERMAL UNIFORMITY
- Publication number 20180337075
- Publication date Nov 22, 2018
- Applied Materials, Inc.
- Dongming IU
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Application
MILLISECOND ANNEALING IN AMMONIA AMBIENT FOR PRECISE PLACEMENT OF N...
- Publication number 20150311067
- Publication date Oct 29, 2015
- Applied Materials, Inc.
- Shashank SHARMA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT HAVING HIGH ALLOWABLE PO...
- Publication number 20130258533
- Publication date Oct 3, 2013
- Jau-Wen Chen
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Application
I/O and Power ESD Protection Circuits By Enhancing Substrate-Bias i...
- Publication number 20110215410
- Publication date Sep 8, 2011
- LSI Corporation
- Jau-Wen Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
I/O AND POWER ESD PROTECTION CIRCUITS BY ENHANCING SUBSTRATE-BIAS I...
- Publication number 20090294856
- Publication date Dec 3, 2009
- LSI Corporation
- Jau-Wen Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Electrostatic discharge series protection
- Publication number 20070138973
- Publication date Jun 21, 2007
- William M. Loh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Bias for electrostatic discharge protection
- Publication number 20070121262
- Publication date May 31, 2007
- William M. Loh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Design of silicon-controlled rectifier by considering electrostatic...
- Publication number 20070045656
- Publication date Mar 1, 2007
- Jau-Wen Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Electrostatic discharge testing
- Publication number 20070018670
- Publication date Jan 25, 2007
- Choshu Ito
- G01 - MEASURING TESTING
Information Patent Application
Circuit protection system
- Publication number 20070019345
- Publication date Jan 25, 2007
- William M. Loh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Novel implantation method to improve ESD robustness of thick gate-o...
- Publication number 20060180863
- Publication date Aug 17, 2006
- LSI Logic Corporation
- Jau-Wen Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Design and optimization of NMOS drivers using self-ballasting ESD p...
- Publication number 20060175665
- Publication date Aug 10, 2006
- LSI Logic Corporation
- Jau-Wen Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
I/O and power ESD protection circuits by enhancing substrate-bias i...
- Publication number 20060033163
- Publication date Feb 16, 2006
- LSI Logic Corporation
- Jau-Wen Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Substrate-biased I/O and power ESD protection circuits in deep-subm...
- Publication number 20050082621
- Publication date Apr 21, 2005
- Jau-Wen Chen
- H01 - BASIC ELECTRIC ELEMENTS

Jau-Jiun CHEN

Person

Patents Grantslast 30 patents

Thermal chamber with improved thermal uniformity

Electrostatic discharge protection circuit having high allowable po...

I/O and power ESD protection circuits by enhancing substrate-bias i...

I/O and power ESD protection circuits by enhancing substrate-bias i...

Circuit protection system

Design of silicon-controlled rectifier by considering electrostatic...

I/O and power ESD protection circuits by enhancing substrate-bias i...

Electrostatic discharge series protection

Bias for electrostatic discharge protection

Electrostatic discharge testing

Optimization of NMOS drivers using self-ballasting ESD protection t...

Implantation method to improve ESD robustness of thick gate-oxide g...

Substrate-biased I/O and power ESD protection circuits in deep-subm...

Input and power protection circuit implemented in a complementary m...

Patents Applicationslast 30 patents

THERMAL CHAMBER WITH IMPROVED THERMAL UNIFORMITY

MILLISECOND ANNEALING IN AMMONIA AMBIENT FOR PRECISE PLACEMENT OF N...

ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT HAVING HIGH ALLOWABLE PO...

I/O and Power ESD Protection Circuits By Enhancing Substrate-Bias i...

I/O AND POWER ESD PROTECTION CIRCUITS BY ENHANCING SUBSTRATE-BIAS I...

Electrostatic discharge series protection

Bias for electrostatic discharge protection

Design of silicon-controlled rectifier by considering electrostatic...

Electrostatic discharge testing

Circuit protection system

Novel implantation method to improve ESD robustness of thick gate-o...

Design and optimization of NMOS drivers using self-ballasting ESD p...

I/O and power ESD protection circuits by enhancing substrate-bias i...

Substrate-biased I/O and power ESD protection circuits in deep-subm...