Javier Solo Gonzalez

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Chandler, AZ, US

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Patents Grantslast 30 patents

Information Patent Grant
Die-stacking using through-silicon vias on bumpless build-up layer...
- Patent number 9,406,618
- Issue date Aug 2, 2016
- Intel Corporation
- John S. Guzek
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
DIE-STACKING USING THROUGH-SILICON VIAS ON BUMPLESS BUILD-UP LAYER...
- Publication number 20140327149
- Publication date Nov 6, 2014
- John S. Guzek
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIE-STACKING USING THROUGH-SILICON VIAS ON BUMPLESS BUILD-UP LAYER...
- Publication number 20140295621
- Publication date Oct 2, 2014
- John S. Guzek
- H01 - BASIC ELECTRIC ELEMENTS