Jawad Nasrullah

Person

Palo Alto, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Over-the-air hardware update
- Patent number 11,995,387
- Issue date May 28, 2024
- SHENZHEN CHIPULLER CHIP TECHNOLOGY CO., LTD
- Hao Hua
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus to use active semiconductor interposers for RF...
- Patent number 11,728,909
- Issue date Aug 15, 2023
- SHENZHEN CHIPULLER CHIP TECHNOLOGY CO., LTD
- Jawad Nasrullah
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Assembly of flexible and integrated module packages with leadframes
- Patent number 11,476,182
- Issue date Oct 18, 2022
- SHENZHEN CHIPULLER CHIP TECHNOLOGY CO., LTD
- Zhiquan Luo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Over-the-air hardware update
- Patent number 11,361,138
- Issue date Jun 14, 2022
- SHENZHEN CHIPULLER CHIP TECHNOLOGY CO., LTD
- Hao Hua
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus to use active semiconductor interposers for RF...
- Patent number 11,329,734
- Issue date May 10, 2022
- SHENZHEN CHIPULLER CHIP TECHNOLOGY CO., LTD
- Jawad Nasrullah
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and systems for energy efficiency and energy conservation in...
- Patent number 10,725,524
- Issue date Jul 28, 2020
- Intel Corporation
- Jawad Nasrullah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Controlling processor consumption using on-off keying having a maxi...
- Patent number 10,168,765
- Issue date Jan 1, 2019
- Intel Corporation
- David Pardo Keppel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for flushing dirty cache lines based on cache...
- Patent number 9,965,023
- Issue date May 8, 2018
- Intel Corporation
- David Keppel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and methods for producing modular stacked integrated circuits
- Patent number 9,842,784
- Issue date Dec 12, 2017
- ZGLUE, INC.
- Jawad Nasrullah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Controlling power consumption of a processor using interrupt-mediat...
- Patent number 9,766,685
- Issue date Sep 19, 2017
- Intel Corporation
- David Keppel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and systems for energy efficiency and energy conservation i...
- Patent number 9,665,144
- Issue date May 30, 2017
- Intel Corporation
- Jawad Nasrullah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for reduced core entry into a power state havi...
- Patent number 9,442,849
- Issue date Sep 13, 2016
- Intel Corporation
- David Keppel
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Controlling processor consumption using on-off keying having a maxi...
- Patent number 9,354,694
- Issue date May 31, 2016
- Intel Corporation
- David Pardo Keppel
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Method and apparatus for managing a spin transfer torque memory
- Patent number 9,342,403
- Issue date May 17, 2016
- Intel Corporation
- David Pardo Keppel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Block-level sleep logic
- Patent number 9,329,658
- Issue date May 3, 2016
- Intel Corporation
- David Pardo Keppel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and systems for energy efficiency and energy conservation in...
- Patent number 9,280,190
- Issue date Mar 8, 2016
- Intel Corporation
- Jawad Nasrullah
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Semiconductor chip with adaptive BIST cache testing during runtime
- Patent number 9,229,872
- Issue date Jan 5, 2016
- Intel Corporation
- Christopher Wilkerson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Formation of a super steep retrograde channel
- Patent number 8,298,896
- Issue date Oct 30, 2012
- James B. Burr
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Formation of a super steep retrograde channel
- Patent number 8,003,471
- Issue date Aug 23, 2011
- James B. Burr
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Raised source/drain with super steep retrograde channel
- Patent number 7,683,442
- Issue date Mar 23, 2010
- James B. Burr
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
ASSEMBLY OF FLEXIBLE AND INTEGRATED MODULE PACKAGES WITH LEADFRAMES
- Publication number 20220319967
- Publication date Oct 6, 2022
- Shenzhen Chipuller Chip Technology Co., LTD.
- Zhiquan Luo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
OVER-THE-AIR HARDWARE UPDATE
- Publication number 20220253584
- Publication date Aug 11, 2022
- Shenzhen Chipuller Chip Technology Co., LTD.
- Hao Hua
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS TO USE ACTIVE SEMICONDUCTOR INTERPOSERS FOR RF...
- Publication number 20220239389
- Publication date Jul 28, 2022
- Shenzhen Chipuller Chip Technology Co., LTD.
- Jawad Nasrullah
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD AND APPARATUS TO USE ACTIVE SILICON INTERPOSERS FOR RF SIGNA...
- Publication number 20210143921
- Publication date May 13, 2021
- zGlue, Inc.
- Jawad Nasrullah
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ASSEMBLY OF FLEXIBLE AND INTEGRATED MODULE PACKAGES WITH LEADFRAMES
- Publication number 20200279798
- Publication date Sep 3, 2020
- zGlue Inc.
- Zhiquan Luo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
OVER-THE-AIR HARDWARE UPDATE
- Publication number 20200026815
- Publication date Jan 23, 2020
- zGlue Inc.
- Hao HUA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHODS FOR PRODUCING MODULAR STACKED INTEGRATED CIRCUITS
- Publication number 20170062294
- Publication date Mar 2, 2017
- zGlue, Inc.
- Jawad Nasrullah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR REDUCED CORE ENTRY INTO A POWER STATE HAVI...
- Publication number 20170003734
- Publication date Jan 5, 2017
- Intel Corporation
- DAVID KEPPEL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FIRST DROOP EVENT MITIGATION BY CLOCK GENERATION FREQUENCY STAGGERI...
- Publication number 20160370837
- Publication date Dec 22, 2016
- Samsung Electronics Co., Ltd.
- Jin SHI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONTROLLING PROCESSOR CONSUMPTION USING ON-OFF KEYING HAVING A MAXI...
- Publication number 20160320832
- Publication date Nov 3, 2016
- Intel Corporation
- David Pardo Keppel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEMS FOR ENERGY EFFICIENCY AND ENERGY CONSERVATION IN...
- Publication number 20160179175
- Publication date Jun 23, 2016
- Intel Corporation
- Jawad Nasrullah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR MANAGING A SPIN TRANSFER TORQUE MEMORY
- Publication number 20150278011
- Publication date Oct 1, 2015
- Intel Corporation
- DAVID PARDO KEPPEL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Controlling Power Consumption Of A Processor Using Interrupt-Mediat...
- Publication number 20140344596
- Publication date Nov 20, 2014
- David Keppel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Controlling Processor Consumption Using On-Off Keying Having A Maxi...
- Publication number 20140281602
- Publication date Sep 18, 2014
- David Pardo Keppel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Semiconductor Chip With Adaptive BIST Cache Testing During Runtime
- Publication number 20140281254
- Publication date Sep 18, 2014
- Christopher WILKERSON
- G01 - MEASURING TESTING
Information Patent Application
BLOCK-LEVEL SLEEP LOGIC
- Publication number 20140189401
- Publication date Jul 3, 2014
- DAVID PARDO KEPPEL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus and Method For Reduced Core Entry Into A Power State Havi...
- Publication number 20140189240
- Publication date Jul 3, 2014
- David KEPPEL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEMS FOR ENERGY EFFICIENCY AND ENERGY CONSERVATION IN...
- Publication number 20120166838
- Publication date Jun 28, 2012
- Jawad Nasrullah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND SYSTEMS FOR ENERGY EFFICIENCY AND ENERGY CONSERVATION I...
- Publication number 20120151235
- Publication date Jun 14, 2012
- Jawad Nasrullah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RAISED SOURCE/DRAIN WITH SUPER STEEP RETROGRADE CHANNEL
- Publication number 20110300681
- Publication date Dec 8, 2011
- James B. Burr
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RAISED SOURCE/DRAIN WITH SUPER STEEP RETROGRADE CHANNEL
- Publication number 20100159662
- Publication date Jun 24, 2010
- James B. Burr
- H01 - BASIC ELECTRIC ELEMENTS

Jawad Nasrullah

Person

Patents Grantslast 30 patents

Over-the-air hardware update

Method and apparatus to use active semiconductor interposers for RF...

Assembly of flexible and integrated module packages with leadframes

Over-the-air hardware update

Method and apparatus to use active semiconductor interposers for RF...

Method and systems for energy efficiency and energy conservation in...

Controlling processor consumption using on-off keying having a maxi...

Apparatus and method for flushing dirty cache lines based on cache...

System and methods for producing modular stacked integrated circuits

Controlling power consumption of a processor using interrupt-mediat...

Methods and systems for energy efficiency and energy conservation i...

Apparatus and method for reduced core entry into a power state havi...

Controlling processor consumption using on-off keying having a maxi...

Method and apparatus for managing a spin transfer torque memory

Block-level sleep logic

Method and systems for energy efficiency and energy conservation in...

Semiconductor chip with adaptive BIST cache testing during runtime

Formation of a super steep retrograde channel

Formation of a super steep retrograde channel

Raised source/drain with super steep retrograde channel

Patents Applicationslast 30 patents

ASSEMBLY OF FLEXIBLE AND INTEGRATED MODULE PACKAGES WITH LEADFRAMES

OVER-THE-AIR HARDWARE UPDATE

METHOD AND APPARATUS TO USE ACTIVE SEMICONDUCTOR INTERPOSERS FOR RF...

METHOD AND APPARATUS TO USE ACTIVE SILICON INTERPOSERS FOR RF SIGNA...

ASSEMBLY OF FLEXIBLE AND INTEGRATED MODULE PACKAGES WITH LEADFRAMES

OVER-THE-AIR HARDWARE UPDATE

SYSTEM AND METHODS FOR PRODUCING MODULAR STACKED INTEGRATED CIRCUITS

APPARATUS AND METHOD FOR REDUCED CORE ENTRY INTO A POWER STATE HAVI...

FIRST DROOP EVENT MITIGATION BY CLOCK GENERATION FREQUENCY STAGGERI...

CONTROLLING PROCESSOR CONSUMPTION USING ON-OFF KEYING HAVING A MAXI...

METHOD AND SYSTEMS FOR ENERGY EFFICIENCY AND ENERGY CONSERVATION IN...

METHOD AND APPARATUS FOR MANAGING A SPIN TRANSFER TORQUE MEMORY

Controlling Power Consumption Of A Processor Using Interrupt-Mediat...

Controlling Processor Consumption Using On-Off Keying Having A Maxi...

Semiconductor Chip With Adaptive BIST Cache Testing During Runtime

BLOCK-LEVEL SLEEP LOGIC

Apparatus and Method For Reduced Core Entry Into A Power State Havi...

METHOD AND SYSTEMS FOR ENERGY EFFICIENCY AND ENERGY CONSERVATION IN...

METHODS AND SYSTEMS FOR ENERGY EFFICIENCY AND ENERGY CONSERVATION I...

RAISED SOURCE/DRAIN WITH SUPER STEEP RETROGRADE CHANNEL

RAISED SOURCE/DRAIN WITH SUPER STEEP RETROGRADE CHANNEL