Jayanta Roy

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San Jose, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
Integrated circuit analysis using a multi-level data hierarchy impl...
- Patent number 11,630,934
- Issue date Apr 18, 2023
- Synopsys, Inc.
- Jayanta Roy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for estimating ideal power of an integrated ci...
- Patent number 10,248,746
- Issue date Apr 2, 2019
- Cadence Design Systems, Inc.
- Ajay Singh Bisht
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for automated design of integrated circuits with targeted qu...
- Patent number 7,225,423
- Issue date May 29, 2007
- Zenasis Technologies, Inc.
- Debashis Bhattacharya
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
WAVEFORM CALCULATION USING HYBRID EVALUATION AND SIMULATION APPROACH
- Publication number 20250028888
- Publication date Jan 23, 2025
- Synopsys, Inc.
- Ajay Singh Bisht
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for automated design of integrated circuits with targeted qu...
- Publication number 20020069396
- Publication date Jun 6, 2002
- Zenasis Technologies, Inc.
- Debashis Bhattacharya
- G06 - COMPUTING CALCULATING COUNTING