Jayavel Pachamuthu

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Non-volatile memory with efficient testing during erase
- Patent number 11,810,628
- Issue date Nov 7, 2023
- SanDisk Technologies LLC
- Jayavel Pachamuthu
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for warpage detection in a CMOS bonded array
- Patent number 11,682,595
- Issue date Jun 20, 2023
- Western Digital Technologies, Inc.
- Kirubakaran Periyannan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Non-volatile memory with efficient testing during erase
- Patent number 11,657,884
- Issue date May 23, 2023
- SanDisk Technologies LLC
- Jayavel Pachamuthu
- G11 - INFORMATION STORAGE
Information Patent Grant
Prevention of latent block fails in three-dimensional NAND
- Patent number 11,587,618
- Issue date Feb 21, 2023
- SanDisk Technologies LLC
- Jayavel Pachamuthu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory controller for resolving string to string shorts
- Patent number 11,573,731
- Issue date Feb 7, 2023
- Western Digital Technologies, Inc.
- Jayavel Pachamuthu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor device including coupled bond pads having differing n...
- Patent number 11,462,497
- Issue date Oct 4, 2022
- Western Digital Technologies, Inc.
- Kirubakaran Periyannan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Straight wirebonding of silicon dies
- Patent number 11,456,272
- Issue date Sep 27, 2022
- Western Digital Technologies, Inc.
- Kirubakaran Periyannan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
System and method for die crack detection in a CMOS bonded array
- Patent number 11,450,575
- Issue date Sep 20, 2022
- Western Digital Technologies, Inc.
- Jayavel Pachamuthu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory controller for resolving string to string shorts
- Patent number 11,422,736
- Issue date Aug 23, 2022
- Western Digital Technologies, Inc.
- Jayavel Pachamuthu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor device including vertical bond pads
- Patent number 11,222,865
- Issue date Jan 11, 2022
- Western Digital Technologies, Inc.
- Kirubakaran Periyannan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device including fractured semiconductor dies
- Patent number 11,195,820
- Issue date Dec 7, 2021
- SanDisk Technologies LLC
- Daniel Linnen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Three-dimensional memory device containing aluminum-silicon word li...
- Patent number 11,164,883
- Issue date Nov 2, 2021
- SanDisk Technologies LLC
- Peter Rabkin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device including fractured semiconductor dies
- Patent number 11,139,276
- Issue date Oct 5, 2021
- SanDisk Technologies LLC
- Daniel Linnen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Program disturb improvements in multi-tier memory devices including...
- Patent number 11,107,540
- Issue date Aug 31, 2021
- SanDisk Technologies LLC
- Jayavel Pachamuthu
- G11 - INFORMATION STORAGE
Information Patent Grant
Three-dimensional memory device containing etch stop structures and...
- Patent number 11,101,284
- Issue date Aug 24, 2021
- SanDisk Technologies LLC
- Jayavel Pachamuthu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Column erasing in non-volatile memory strings
- Patent number 11,037,631
- Issue date Jun 15, 2021
- SanDisk Technologies LLC
- Jayavel Pachamuthu
- G11 - INFORMATION STORAGE
Information Patent Grant
Three-dimensional memory device containing a silicon nitride ring i...
- Patent number 11,024,645
- Issue date Jun 1, 2021
- SanDisk Technologies LLC
- Takumi Moriyama
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Three-dimensional memory device containing a vertical semiconductor...
- Patent number 10,991,718
- Issue date Apr 27, 2021
- SanDisk Technologies LLC
- Jayavel Pachamuthu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Three-dimensional memory device having enhanced contact between pol...
- Patent number 10,991,705
- Issue date Apr 27, 2021
- SanDisk Technologies LLC
- Masatoshi Nishikawa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Three-dimensional memory device having enhanced contact between pol...
- Patent number 10,991,706
- Issue date Apr 27, 2021
- SanDisk Technologies LLC
- Masatoshi Nishikawa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Different word line programming orders in non-volatile memory for e...
- Patent number 10,943,662
- Issue date Mar 9, 2021
- Western Digital Technologies, Inc.
- Daniel Linnen
- G11 - INFORMATION STORAGE
Information Patent Grant
Controlled string erase for nonvolatile memory
- Patent number 10,861,559
- Issue date Dec 8, 2020
- SanDisk Technologies LLC
- Amul Desai
- G11 - INFORMATION STORAGE
Information Patent Grant
Three-dimensional memory device containing aluminum-silicon word li...
- Patent number 10,763,271
- Issue date Sep 1, 2020
- SanDisk Technologies LLC
- Peter Rabkin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Support pillar structures for leakage reduction in a three-dimensio...
- Patent number 10,475,879
- Issue date Nov 12, 2019
- SanDisk Technologies LLC
- Jayavel Pachamuthu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Support pillar structures for leakage reduction in a three-dimensio...
- Patent number 10,381,434
- Issue date Aug 13, 2019
- SanDisk Technologies LLC
- Jayavel Pachamuthu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Select transistors with tight threshold voltage in 3D memory
- Patent number 10,128,257
- Issue date Nov 13, 2018
- SanDisk Technologies LLC
- Liang Pang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Three-dimensional memory device having epitaxial germanium-containi...
- Patent number 10,121,794
- Issue date Nov 6, 2018
- SanDisk Technologies LLC
- Marika Gunji-Yoneoka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multiple liner interconnects for three dimensional memory devices a...
- Patent number 10,115,459
- Issue date Oct 30, 2018
- SanDisk Technologies LLC
- Katsuo Yamada
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Offset backside contact via structures for a three-dimensional memo...
- Patent number 10,103,161
- Issue date Oct 16, 2018
- SanDisk Technologies LLC
- Fumitoshi Ito
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Techniques for determining local interconnect defects
- Patent number 10,032,524
- Issue date Jul 24, 2018
- SanDisk Technologies LLC
- Jagdish Sabde
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
INTEGRATED MEMORY AND CONTROL DIES
- Publication number 20240276740
- Publication date Aug 15, 2024
- SANDISK TECHNOLOGIES LLC
- Srinivasan Sivaram
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
System and Method for Die Crack Detection in Wafer-to-Wafer Bonding
- Publication number 20240249984
- Publication date Jul 25, 2024
- Western Digital Technologies, Inc.
- Jayavel Pachamuthu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH DENSITY SEMICONDUCTOR DEVICE INCLUDING INTEGRATED CONTROLLER,...
- Publication number 20240096850
- Publication date Mar 21, 2024
- SANDISK TECHNOLOGIES LLC
- Jayavel Pachamuthu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TECHNIQUES FOR DETERMINING LAST PROGRAMMED WORDLINE
- Publication number 20230402101
- Publication date Dec 14, 2023
- KIRUBAKARAN PERIYANNAN
- G11 - INFORMATION STORAGE
Information Patent Application
CLAMPED SEMICONDUCTOR WAFERS AND SEMICONDUCTOR DEVICES
- Publication number 20230326887
- Publication date Oct 12, 2023
- Western Digital Technologies, Inc.
- Kirubakaran Periyannan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NON-VOLATILE MEMORY WITH EFFICIENT TESTING DURING ERASE
- Publication number 20230260582
- Publication date Aug 17, 2023
- SANDISK TECHNOLOGIES LLC
- Jayavel Pachamuthu
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE MEMORY WITH EFFICIENT TESTING
- Publication number 20230058836
- Publication date Feb 23, 2023
- SANDISK TECHNOLOGIES LLC
- Jayavel Pachamuthu
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE MEMORY WITH EFFICIENT TESTING DURING ERASE
- Publication number 20230059837
- Publication date Feb 23, 2023
- SANDISK TECHNOLOGIES LLC
- Jayavel Pachamuthu
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CONTROLLER FOR RESOLVING STRING TO STRING SHORTS
- Publication number 20220357874
- Publication date Nov 10, 2022
- Western Digital Technologies, Inc.
- Jayavel Pachamuthu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PREVENTION OF LATENT BLOCK FAILS IN THREE-DIMENSIONAL NAND
- Publication number 20220310161
- Publication date Sep 29, 2022
- SANDISK TECHNOLOGIES LLC
- Jayavel Pachamuthu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE INCLUDING COUPLED BOND PADS HAVING DIFFERING N...
- Publication number 20220115343
- Publication date Apr 14, 2022
- Western Digital Technologies, Inc.
- Kirubakaran Periyannan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
System and Method for Die Crack Detection in a CMOS Bonded Array
- Publication number 20220108926
- Publication date Apr 7, 2022
- Western Digital Technologies, Inc.
- Jayavel Pachamuthu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
System and Method for Warpage Detection in a CMOS Bonded Array
- Publication number 20220093476
- Publication date Mar 24, 2022
- Western Digital Technologies, Inc.
- Kirubakaran Periyannan
- G01 - MEASURING TESTING
Information Patent Application
STRAIGHT WIREBONDING OF SILICON DIES
- Publication number 20220084979
- Publication date Mar 17, 2022
- Western Digital Technologies, Inc.
- Kirubakaran Periyannan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEMORY CONTROLLER FOR RESOLVING STRING TO STRING SHORTS
- Publication number 20210389901
- Publication date Dec 16, 2021
- Western Digital Technologies, Inc.
- Jayavel Pachamuthu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR DEVICE INCLUDING VERTICAL BOND PADS
- Publication number 20210358886
- Publication date Nov 18, 2021
- Western Digital Technologies, Inc.
- Kirubakaran Periyannan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE INCLUDING FRACTURED SEMICONDUCTOR DIES
- Publication number 20210280559
- Publication date Sep 9, 2021
- SANDISK TECHNOLOGIES LLC
- Daniel Linnen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Program Disturb Improvements in Multi-Tier Memory Devices Including...
- Publication number 20210257035
- Publication date Aug 19, 2021
- SANDISK TECHNOLOGIES LLC
- Jayavel Pachamuthu
- G11 - INFORMATION STORAGE
Information Patent Application
THREE-DIMENSIONAL MEMORY DEVICE HAVING ENHANCED CONTACT BETWEEN POL...
- Publication number 20210035998
- Publication date Feb 4, 2021
- SANDISK TECHNOLOGIES LLC
- Masatoshi NISHIKAWA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THREE-DIMENSIONAL MEMORY DEVICE CONTAINING A VERTICAL SEMICONDUCTOR...
- Publication number 20210036003
- Publication date Feb 4, 2021
- SANDISK TECHNOLOGIES LLC
- Jayavel PACHAMUTHU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THREE-DIMENSIONAL MEMORY DEVICE HAVING ENHANCED CONTACT BETWEEN POL...
- Publication number 20210035999
- Publication date Feb 4, 2021
- SANDISK TECHNOLOGIES LLC
- Masatoshi NISHIKAWA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THREE-DIMENSIONAL MEMORY DEVICE CONTAINING A SILICON NITRIDE RING I...
- Publication number 20210036004
- Publication date Feb 4, 2021
- SANDISK TECHNOLOGIES LLC
- Takumi MORIYAMA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THREE-DIMENSIONAL MEMORY DEVICE CONTAINING ETCH STOP STRUCTURES AND...
- Publication number 20200194450
- Publication date Jun 18, 2020
- SANDISK TECHNOLOGIES LLC
- Jayavel Pachamuthu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
COLUMN ERASING IN NON-VOLATILE MEMORY STRINGS
- Publication number 20200013469
- Publication date Jan 9, 2020
- SANDISK TECHNOLOGIES LLC
- Jayavel Pachamuthu
- G11 - INFORMATION STORAGE
Information Patent Application
THREE-DIMENSIONAL MEMORY DEVICE CONTAINING ALUMINUM-SILICON WORD LI...
- Publication number 20200006374
- Publication date Jan 2, 2020
- SANDISK TECHNOLOGIES LLC
- Peter RABKIN
- G11 - INFORMATION STORAGE
Information Patent Application
THREE-DIMENSIONAL MEMORY DEVICE CONTAINING ALUMINUM-SILICON WORD LI...
- Publication number 20200006364
- Publication date Jan 2, 2020
- SANDISK TECHNOLOGIES LLC
- Peter RABKIN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELECT TRANSISTORS WITH TIGHT THRESHOLD VOLTAGE IN 3D MEMORY
- Publication number 20180190667
- Publication date Jul 5, 2018
- SanDisk Technologies LLC
- Liang Pang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THREE-DIMENSIONAL MEMORY DEVICE WITH LEAKAGE REDUCING SUPPORT PILLA...
- Publication number 20180108671
- Publication date Apr 19, 2018
- SanDisk Technologies LLC
- Fabo YU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELECT TRANSISTORS WITH TIGHT THRESHOLD VOLTAGE IN 3D MEMORY
- Publication number 20180102375
- Publication date Apr 12, 2018
- SanDisk Technologies LLC
- Liang Pang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
OFFSET BACKSIDE CONTACT VIA STRUCTURES FOR A THREE-DIMENSIONAL MEMO...
- Publication number 20170373087
- Publication date Dec 28, 2017
- SanDisk Technologies LLC
- Fumitoshi ITO
- H01 - BASIC ELECTRIC ELEMENTS

Jayavel Pachamuthu

Person

Patents Grantslast 30 patents

Non-volatile memory with efficient testing during erase

System and method for warpage detection in a CMOS bonded array

Non-volatile memory with efficient testing during erase

Prevention of latent block fails in three-dimensional NAND

Memory controller for resolving string to string shorts

Semiconductor device including coupled bond pads having differing n...

Straight wirebonding of silicon dies

System and method for die crack detection in a CMOS bonded array

Memory controller for resolving string to string shorts

Semiconductor device including vertical bond pads

Semiconductor device including fractured semiconductor dies

Three-dimensional memory device containing aluminum-silicon word li...

Semiconductor device including fractured semiconductor dies

Program disturb improvements in multi-tier memory devices including...

Three-dimensional memory device containing etch stop structures and...

Column erasing in non-volatile memory strings

Three-dimensional memory device containing a silicon nitride ring i...

Three-dimensional memory device containing a vertical semiconductor...

Three-dimensional memory device having enhanced contact between pol...

Three-dimensional memory device having enhanced contact between pol...

Different word line programming orders in non-volatile memory for e...

Controlled string erase for nonvolatile memory

Three-dimensional memory device containing aluminum-silicon word li...

Support pillar structures for leakage reduction in a three-dimensio...

Support pillar structures for leakage reduction in a three-dimensio...

Select transistors with tight threshold voltage in 3D memory

Three-dimensional memory device having epitaxial germanium-containi...

Multiple liner interconnects for three dimensional memory devices a...

Offset backside contact via structures for a three-dimensional memo...

Techniques for determining local interconnect defects

Patents Applicationslast 30 patents

INTEGRATED MEMORY AND CONTROL DIES

System and Method for Die Crack Detection in Wafer-to-Wafer Bonding

HIGH DENSITY SEMICONDUCTOR DEVICE INCLUDING INTEGRATED CONTROLLER,...

TECHNIQUES FOR DETERMINING LAST PROGRAMMED WORDLINE

CLAMPED SEMICONDUCTOR WAFERS AND SEMICONDUCTOR DEVICES

NON-VOLATILE MEMORY WITH EFFICIENT TESTING DURING ERASE

NON-VOLATILE MEMORY WITH EFFICIENT TESTING

NON-VOLATILE MEMORY WITH EFFICIENT TESTING DURING ERASE

MEMORY CONTROLLER FOR RESOLVING STRING TO STRING SHORTS

PREVENTION OF LATENT BLOCK FAILS IN THREE-DIMENSIONAL NAND

SEMICONDUCTOR DEVICE INCLUDING COUPLED BOND PADS HAVING DIFFERING N...

System and Method for Die Crack Detection in a CMOS Bonded Array

System and Method for Warpage Detection in a CMOS Bonded Array

STRAIGHT WIREBONDING OF SILICON DIES

MEMORY CONTROLLER FOR RESOLVING STRING TO STRING SHORTS

SEMICONDUCTOR DEVICE INCLUDING VERTICAL BOND PADS

SEMICONDUCTOR DEVICE INCLUDING FRACTURED SEMICONDUCTOR DIES

Program Disturb Improvements in Multi-Tier Memory Devices Including...

THREE-DIMENSIONAL MEMORY DEVICE HAVING ENHANCED CONTACT BETWEEN POL...

THREE-DIMENSIONAL MEMORY DEVICE CONTAINING A VERTICAL SEMICONDUCTOR...

THREE-DIMENSIONAL MEMORY DEVICE HAVING ENHANCED CONTACT BETWEEN POL...

THREE-DIMENSIONAL MEMORY DEVICE CONTAINING A SILICON NITRIDE RING I...

THREE-DIMENSIONAL MEMORY DEVICE CONTAINING ETCH STOP STRUCTURES AND...

COLUMN ERASING IN NON-VOLATILE MEMORY STRINGS

THREE-DIMENSIONAL MEMORY DEVICE CONTAINING ALUMINUM-SILICON WORD LI...

THREE-DIMENSIONAL MEMORY DEVICE CONTAINING ALUMINUM-SILICON WORD LI...

SELECT TRANSISTORS WITH TIGHT THRESHOLD VOLTAGE IN 3D MEMORY

THREE-DIMENSIONAL MEMORY DEVICE WITH LEAKAGE REDUCING SUPPORT PILLA...

SELECT TRANSISTORS WITH TIGHT THRESHOLD VOLTAGE IN 3D MEMORY

OFFSET BACKSIDE CONTACT VIA STRUCTURES FOR A THREE-DIMENSIONAL MEMO...