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Jean-Luc Danger
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Paris, FR
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Patents Grants
last 30 patents
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Patent Grant
On-chip monitor circuit and semiconductor chip
Patent number
10,776,484
Issue date
Sep 15, 2020
National University Corporation Kobe University
Makoto Nagata
G06 - COMPUTING CALCULATING COUNTING
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Patent Grant
Digital delay line
Patent number
5,719,515
Issue date
Feb 17, 1998
SGS-Thomson Microelectronics S.A.
Jean-Luc Danger
H03 - BASIC ELECTRONIC CIRCUITRY
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Patent Grant
Digital delay line
Patent number
5,633,608
Issue date
May 27, 1997
SGS-Thomson Microelectronics S.A.
Jean-Luc Danger
H03 - BASIC ELECTRONIC CIRCUITRY
Patents Applications
last 30 patents
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Patent Application
ON-CHIP MONITOR CIRCUIT AND SEMICONDUCTOR CHIP
Publication number
20180004944
Publication date
Jan 4, 2018
NATIONAL UNIVERSITY CORPORATION KOBE UNIVERSITY
Makoto NAGATA
G01 - MEASURING TESTING