Jean-Marc Dortu

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S. Burlington, VT, US

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Patents Grantslast 30 patents

Information Patent Grant
Clock latency compensation circuit for DDR timing
- Patent number 6,100,733
- Issue date Aug 8, 2000
- Siemens Aktiengesellschaft
- Jean-Marc Dortu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Lock arrangement for a calibrated DLL in DDR SDRAM applications
- Patent number 6,043,694
- Issue date Mar 28, 2000
- Siemens Aktiengesellschaft
- Jean-Marc Dortu
- G11 - INFORMATION STORAGE
Information Patent Grant
Variable domain redundancy replacement configuration for a memory d...
- Patent number 5,978,931
- Issue date Nov 2, 1999
- International Business Machines Corporation
- Toshiaki Kirihata
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of making a memory device fault tolerant using a variable do...
- Patent number 5,881,003
- Issue date Mar 9, 1999
- International Business Machines Corporation
- Toshiaki Kirihata
- G11 - INFORMATION STORAGE