Jean-Marc Dortu

Person

Munich, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor memory device with write protected memory banks
- Patent number 7,467,254
- Issue date Dec 16, 2008
- Infineon Technologies AG
- Jean-Marc Dortu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory apparatus having a short word line cycle time and method for...
- Patent number 7,092,300
- Issue date Aug 15, 2006
- Infineon Technologies AG
- Jean-Marc Dortu
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated memory having a memory cell array containing a plurality...
- Patent number 7,047,371
- Issue date May 16, 2006
- Infineon Technologies AG
- Jean-Marc Dortu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor memory having a first and second sense amplifier for...
- Patent number 7,009,902
- Issue date Mar 7, 2006
- Infineon Technologies AG
- Jean-Marc Dortu
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory, processor system and method for performing write operations...
- Patent number 6,922,764
- Issue date Jul 26, 2005
- Infineon Technologies AG
- Jean-Marc Dortu
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuit configuration with signal lines for serially transmitting a...
- Patent number 6,791,358
- Issue date Sep 14, 2004
- Infineon Technologies AG
- Jean-Marc Dortu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Printed circuit board for semiconductor memory device
- Patent number 6,781,220
- Issue date Aug 24, 2004
- Infineon Technologies AG
- Andreas Täube
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated dynamic memory device and method for operating an integr...
- Patent number 6,707,705
- Issue date Mar 16, 2004
- Infineon Technologies AG
- Paul Schmölz
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated memory chip with a dynamic memory
- Patent number 6,646,908
- Issue date Nov 11, 2003
- Infineon Technologies AG
- Andreas Täuber
- G11 - INFORMATION STORAGE
Information Patent Grant
Data output interface, in particular for semiconductor memories
- Patent number 6,628,553
- Issue date Sep 30, 2003
- Infineon Technologies AG
- Robert Feurle
- G11 - INFORMATION STORAGE
Information Patent Grant
Delay element using a delay locked loop
- Patent number 6,252,443
- Issue date Jun 26, 2001
- Infineon Technologies North America, Corp.
- Jean-Marc Dortu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Frequency range trimming for a delay line
- Patent number 6,229,364
- Issue date May 8, 2001
- Infineon Technologies North America Corp.
- Jean-Marc Dortu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Delay-locked-loop (DLL) having symmetrical rising and falling clock...
- Patent number 6,127,866
- Issue date Oct 3, 2000
- Infineon Technologies North America Corp.
- Albert M. Chu
- G11 - INFORMATION STORAGE
Information Patent Grant
Power amplifier circuit for integrated digital circuits
- Patent number 4,965,464
- Issue date Oct 23, 1990
- Siemens Aktiengesellschaft
- Paul-Werner Von Basse
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Address amplifier circuit having automatic interlock and protection...
- Patent number 4,958,319
- Issue date Sep 18, 1990
- Siemens Aktiengesellschaft
- Paul-Werner von Basse
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Semiconductor memory apparatus and method for operating a semicondu...
- Publication number 20050281128
- Publication date Dec 22, 2005
- Jean-Marc Dortu
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor memory apparatus and method for operating a semicondu...
- Publication number 20050195670
- Publication date Sep 8, 2005
- Jean-Marc Dortu
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor memory apparatus
- Publication number 20050195977
- Publication date Sep 8, 2005
- Jean-Marc Dortu
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor memory device and circuit arrangement
- Publication number 20050166008
- Publication date Jul 28, 2005
- Infineon Technologies AG
- Jean-Marc Dortu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory apparatus having a short word line cycle time and method for...
- Publication number 20050135139
- Publication date Jun 23, 2005
- Jean-Marc Dortu
- G11 - INFORMATION STORAGE
Information Patent Application
Well-matched echo clock in memory system
- Publication number 20050086424
- Publication date Apr 21, 2005
- Infineon Technologies North America Corp.
- Jong-Hoon Oh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Circuit configuration with signal lines for serially transmitting a...
- Publication number 20030194019
- Publication date Oct 16, 2003
- Jean-Marc Dortu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Integrated memory having a memory cell array containing a plurality...
- Publication number 20030191912
- Publication date Oct 9, 2003
- Jean-Marc Dortu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory, processor system and method for performing write operations...
- Publication number 20030126382
- Publication date Jul 3, 2003
- Jean-Marc Dortu
- G11 - INFORMATION STORAGE
Information Patent Application
Printed circuit board for semiconductor memory device
- Publication number 20030030995
- Publication date Feb 13, 2003
- Andreas Taube
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Test configuration for a parallel functional testing of semiconduct...
- Publication number 20020199139
- Publication date Dec 26, 2002
- Jean-Marc Dortu
- G11 - INFORMATION STORAGE
Information Patent Application
Data output interface, in particular for semiconductor memories
- Publication number 20020181290
- Publication date Dec 5, 2002
- Robert Feurle
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated memory chip with a dynamic memory
- Publication number 20020141230
- Publication date Oct 3, 2002
- Andreas Tauber
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated dynamic memory device and method for operating an integr...
- Publication number 20020141229
- Publication date Oct 3, 2002
- Paul Schmolz
- G11 - INFORMATION STORAGE

Jean-Marc Dortu

Person

Patents Grantslast 30 patents

Semiconductor memory device with write protected memory banks

Memory apparatus having a short word line cycle time and method for...

Integrated memory having a memory cell array containing a plurality...

Semiconductor memory having a first and second sense amplifier for...

Memory, processor system and method for performing write operations...

Circuit configuration with signal lines for serially transmitting a...

Printed circuit board for semiconductor memory device

Integrated dynamic memory device and method for operating an integr...

Integrated memory chip with a dynamic memory

Data output interface, in particular for semiconductor memories

Delay element using a delay locked loop

Frequency range trimming for a delay line

Delay-locked-loop (DLL) having symmetrical rising and falling clock...

Power amplifier circuit for integrated digital circuits

Address amplifier circuit having automatic interlock and protection...

Patents Applicationslast 30 patents

Semiconductor memory apparatus and method for operating a semicondu...

Semiconductor memory apparatus and method for operating a semicondu...

Semiconductor memory apparatus

Semiconductor memory device and circuit arrangement

Memory apparatus having a short word line cycle time and method for...

Well-matched echo clock in memory system

Circuit configuration with signal lines for serially transmitting a...

Integrated memory having a memory cell array containing a plurality...

Memory, processor system and method for performing write operations...

Printed circuit board for semiconductor memory device

Test configuration for a parallel functional testing of semiconduct...

Data output interface, in particular for semiconductor memories

Integrated memory chip with a dynamic memory

Integrated dynamic memory device and method for operating an integr...