Jean-Marc Yan-Nou

Person

Colomby Sur Thaon, FR

People

Patents Grantslast 30 patents

Information Patent Grant
Packaged semiconductor product and method for manufacture thereof
- Patent number 8,963,314
- Issue date Feb 24, 2015
- NXP B.V.
- Eric Pieraerts
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device with improved ESD protection
- Patent number 8,541,865
- Issue date Sep 24, 2013
- NXP B.V.
- Jean-Marc Yannou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated package
- Patent number 8,237,256
- Issue date Aug 7, 2012
- IPDIA
- Fabrice Verjus
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit assembly with passive integration substrate for...
- Patent number 8,178,901
- Issue date May 15, 2012
- ST-Ericsson SA
- Patrice Gamand
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Testable electronic circuit
- Patent number 7,899,641
- Issue date Mar 1, 2011
- NXP B.V.
- Hervé Fleury
- G01 - MEASURING TESTING
Information Patent Grant
Electronic circuit comprising a secret sub-module
- Patent number 7,519,496
- Issue date Apr 14, 2009
- NXP B.V.
- Jean-Marc Yannou
- G01 - MEASURING TESTING
Information Patent Grant
Integrated circuit with signature computation
- Patent number 7,519,494
- Issue date Apr 14, 2009
- NXP B.V.
- Stéphane Briere
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
PACKAGED SEMICONDUCTOR PRODUCT AND METHOD FOR MANUFACTURE THEREOF
- Publication number 20110180897
- Publication date Jul 28, 2011
- NXP B.V.
- Eric Pieraerts
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE WITH IMPROVED ESD PROTECTION
- Publication number 20110121425
- Publication date May 26, 2011
- NXP B.V.
- Jean-Marc Yannou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED PACKAGE
- Publication number 20100308450
- Publication date Dec 9, 2010
- IPDIA
- Fabrice Verjus
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SYSTEM-IN-PACKAGE WITH THROUGH SUBSTRATE VIA HOLES
- Publication number 20100044853
- Publication date Feb 25, 2010
- NXP, B.V.
- Ronald Dekker
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
Integrated Circuit Assembly with Passive Integration Substrate for...
- Publication number 20080185614
- Publication date Aug 7, 2008
- NXP B.V.
- Patrice Gamand
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Testable Electronic Circuit
- Publication number 20080133167
- Publication date Jun 5, 2008
- NXP B.V.
- Herve Fleury
- G01 - MEASURING TESTING
Information Patent Application
Electronic circuit comprising a secret sub-module
- Publication number 20070088519
- Publication date Apr 19, 2007
- Koninklijke Philips Electronics N.V.
- Jean-Marc Yannou
- G01 - MEASURING TESTING
Information Patent Application
Integrated circuit with signature computation
- Publication number 20070032982
- Publication date Feb 8, 2007
- Koninklijke Philips Electronics N.V.
- Stephane Briere
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Jean-Marc Yan-Nou

Person

Patents Grantslast 30 patents

Packaged semiconductor product and method for manufacture thereof

Semiconductor device with improved ESD protection

Integrated package

Integrated circuit assembly with passive integration substrate for...

Testable electronic circuit

Electronic circuit comprising a secret sub-module

Integrated circuit with signature computation

Patents Applicationslast 30 patents

PACKAGED SEMICONDUCTOR PRODUCT AND METHOD FOR MANUFACTURE THEREOF

SEMICONDUCTOR DEVICE WITH IMPROVED ESD PROTECTION

INTEGRATED PACKAGE

SYSTEM-IN-PACKAGE WITH THROUGH SUBSTRATE VIA HOLES

Integrated Circuit Assembly with Passive Integration Substrate for...

Testable Electronic Circuit

Electronic circuit comprising a secret sub-module

Integrated circuit with signature computation