Jean-Michel Mirabel

Person

Cabries, FR

People

Patents Grantslast 30 patents

Information Patent Grant
Memory cell having a vertical selection gate formed in an FDSOI sub...
- Patent number 9,691,866
- Issue date Jun 27, 2017
- STMicroelectronics (Rousset) SAS
- Arnaud Regnier
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory cell having a vertical selection gate formed in an FDSOI sub...
- Patent number 9,461,129
- Issue date Oct 4, 2016
- STMicroelectronics (Rousset) SAS
- Arnaud Regnier
- G11 - INFORMATION STORAGE
Information Patent Grant
Reducing the programming current for memory matrices
- Patent number 8,995,190
- Issue date Mar 31, 2015
- STMicroelectronics (Rousset) SAS
- Jean-Michel Mirabel
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit of decreased size
- Patent number 8,426,973
- Issue date Apr 23, 2013
- STMicroelectronics (Rousset) SAS
- Stephan Niel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Non-volatile reprogrammable memory
- Patent number 7,675,106
- Issue date Mar 9, 2010
- STMicroelectronics S.A.
- Rachid Bouchakour
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Floating-gate MOS transistor with double control gate
- Patent number 7,242,621
- Issue date Jul 10, 2007
- STMicroelectronics Rousset SAS
- Jean-Michel Mirabel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Manufacturing process for a flash memory and flash memory thus prod...
- Patent number 7,183,160
- Issue date Feb 27, 2007
- STMicroelectronics (Rousset) SAS
- Olivier Pizzuto
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of controlling an electronic non-volatile memory and associa...
- Patent number 6,829,170
- Issue date Dec 7, 2004
- STMicroelectronics S.A.
- Jean-Michel Mirabel
- G11 - INFORMATION STORAGE
Information Patent Grant
High and low voltage transistor manufacturing method
- Patent number 6,455,386
- Issue date Sep 24, 2002
- STMicroelectronics S.A.
- Jean-Michel Mirabel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
EEPROM device manufacturing method
- Patent number 6,156,609
- Issue date Dec 5, 2000
- STMicroelectronics S.A.
- Jean-Michel Mirabel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods and apparatus for programming content-addressable memories...
- Patent number 5,737,266
- Issue date Apr 7, 1998
- SGS-Thomson Microelectronics S.A.
- Jean-Michel Mirabel
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile-programmable bistable multivibrator, programmable by t...
- Patent number 5,721,706
- Issue date Feb 24, 1998
- SGS-Thomson Microelectronics S.A.
- Jean-Michel Mirabel
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile programmable bistable multivibrator, programmable by t...
- Patent number 5,677,870
- Issue date Oct 14, 1997
- SGS-Thomson Microelectronics S.A.
- Jean-Michel Mirabel
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and circuit for testing memories in integrated circuit form
- Patent number 5,675,539
- Issue date Oct 7, 1997
- SGS-Thomson Microelectronics, S.A.
- Jean-Michel Mirabel
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile programmable bistable multivibrator in predefined init...
- Patent number 5,606,523
- Issue date Feb 25, 1997
- SGS-Thomson Microelectronics S.A.
- Jean-Michel Mirabel
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile programmable bistable multivibrator, programmable by t...
- Patent number 5,592,417
- Issue date Jan 7, 1997
- SGS-Thomson Microelectronics S.A.
- Jean-Michel Mirabel
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile programmable bistable multivibrator with reduced paras...
- Patent number 5,561,621
- Issue date Oct 1, 1996
- SGS-Thomson Microelectronics, S.A.
- Jean Devin
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
MEMORY CELL HAVING A VERTICAL SELECTION GATE FORMED IN AN FDSOI SUB...
- Publication number 20160372561
- Publication date Dec 22, 2016
- STMicroelectronics (Rousset) SAS
- Arnaud Regnier
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEMORY CELL HAVING A VERTICAL SELECTION GATE FORMED IN AN FDSOI SUB...
- Publication number 20160181265
- Publication date Jun 23, 2016
- STMicroelectronics (Rousset) SAS
- Arnaud Regnier
- G11 - INFORMATION STORAGE
Information Patent Application
REDUCING THE PROGRAMMING CURRENT FOR MEMORY MATRICES
- Publication number 20120320681
- Publication date Dec 20, 2012
- STMicroelectronics (Rousset) SAS
- Jean-Michel Mirabel
- G11 - INFORMATION STORAGE
Information Patent Application
INTEGRATED CIRCUIT OF DECREASED SIZE
- Publication number 20100044874
- Publication date Feb 25, 2010
- STMicroelectronics (Rousset) SAS
- Stephan Niel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Non-volatile reprogrammable memory
- Publication number 20070069278
- Publication date Mar 29, 2007
- STMicroelectronics S.A.
- Rachid Bouchakour
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Floating-gate MOS transistor with double control gate
- Publication number 20050286303
- Publication date Dec 29, 2005
- STMicroelectronics Rousset SAS
- Jean-Michel Mirabel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Manufacturing process for a flash memory and flash memory thus prod...
- Publication number 20050087816
- Publication date Apr 28, 2005
- STMicroelectronics S.A.
- Olivier Pizzuto
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of controlling an electronic non-volatile memory and associa...
- Publication number 20040057265
- Publication date Mar 25, 2004
- STMicroelectronics S.A.
- Jean-Michel Mirabel
- G11 - INFORMATION STORAGE
Information Patent Application
EEPROM CELL WITH A SINGLE POLYSILICON LEVEL AND A SELF-ALGNED TUNNE...
- Publication number 20020089011
- Publication date Jul 11, 2002
- JEAN-MICHEL MIRABEL
- H01 - BASIC ELECTRIC ELEMENTS

Jean-Michel Mirabel

Person

Patents Grantslast 30 patents

Memory cell having a vertical selection gate formed in an FDSOI sub...

Memory cell having a vertical selection gate formed in an FDSOI sub...

Reducing the programming current for memory matrices

Integrated circuit of decreased size

Non-volatile reprogrammable memory

Floating-gate MOS transistor with double control gate

Manufacturing process for a flash memory and flash memory thus prod...

Method of controlling an electronic non-volatile memory and associa...

High and low voltage transistor manufacturing method

EEPROM device manufacturing method

Methods and apparatus for programming content-addressable memories...

Non-volatile-programmable bistable multivibrator, programmable by t...

Non-volatile programmable bistable multivibrator, programmable by t...

Method and circuit for testing memories in integrated circuit form

Non-volatile programmable bistable multivibrator in predefined init...

Non-volatile programmable bistable multivibrator, programmable by t...

Non-volatile programmable bistable multivibrator with reduced paras...

Patents Applicationslast 30 patents

MEMORY CELL HAVING A VERTICAL SELECTION GATE FORMED IN AN FDSOI SUB...

MEMORY CELL HAVING A VERTICAL SELECTION GATE FORMED IN AN FDSOI SUB...

REDUCING THE PROGRAMMING CURRENT FOR MEMORY MATRICES

INTEGRATED CIRCUIT OF DECREASED SIZE

Non-volatile reprogrammable memory

Floating-gate MOS transistor with double control gate

Manufacturing process for a flash memory and flash memory thus prod...

Method of controlling an electronic non-volatile memory and associa...

EEPROM CELL WITH A SINGLE POLYSILICON LEVEL AND A SELF-ALGNED TUNNE...