Jean-Pierre Colinge

Person

Grenoble Cedex, FR

People

Patents Grantslast 30 patents

Information Patent Grant
Architecture with stacked N and P transistors with a channel struct...
- Patent number 12,237,330
- Issue date Feb 25, 2025
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Sylvain Barraud
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated electronic device comprising a coil and method for manuf...
- Patent number 11,875,935
- Issue date Jan 16, 2024
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Jean-Pierre Colinge
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Manufacturing process of a structured substrate
- Patent number 11,646,219
- Issue date May 9, 2023
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Jean-Pierre Colinge
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
RF substrate with junctions having an improved layout
- Patent number 11,362,051
- Issue date Jun 14, 2022
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Jean-Pierre Colinge
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for making a transistor of which the active region includes...
- Patent number 11,239,347
- Issue date Feb 1, 2022
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Jean-Pierre Colinge
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for producing transistors implemented at low temperature
- Patent number 11,227,800
- Issue date Jan 18, 2022
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Jean-Pierre Colinge
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Architecture of N and P transistors superposed with canal structure...
- Patent number 11,152,360
- Issue date Oct 19, 2021
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Sylvain Barraud
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
ARCHITECTURE WITH STACKED N AND P TRANSISTORS WITH A CHANNEL STRUCT...
- Publication number 20210391326
- Publication date Dec 16, 2021
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Sylvain Barraud
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RF SUBSTRATE WITH JUNCTIONS HAVING AN IMPROVED LAYOUT
- Publication number 20210296266
- Publication date Sep 23, 2021
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Jean-Pierre COLINGE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MANUFACTURING PROCESS OF A STRUCTURED SUBSTRATE
- Publication number 20210242071
- Publication date Aug 5, 2021
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Jean-Pierre COLINGE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED ELECTRONIC DEVICE COMPRISING A COIL AND METHOD FOR MANUF...
- Publication number 20210159012
- Publication date May 27, 2021
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Jean-Pierre COLINGE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR PRODUCING TRANSISTORS IMPLEMENTED AT LOW TEMPERATURE
- Publication number 20200395249
- Publication date Dec 17, 2020
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Jean-Pierre COLINGE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MAKING A TRANSISTOR OF WHICH THE ACTIVE REGION INCLUDES...
- Publication number 20200343374
- Publication date Oct 29, 2020
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Jean-Pierre COLINGE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ARCHITECTURE OF N AND P TRANSISTORS SUPERPOSED WITH CANAL STRUCTURE...
- Publication number 20200203341
- Publication date Jun 25, 2020
- Commissariat A L'Energie Atomique et Aux Energies Alternatives
- Sylvain Barraud
- H01 - BASIC ELECTRIC ELEMENTS

Jean-Pierre Colinge

Person

Patents Grantslast 30 patents

Architecture with stacked N and P transistors with a channel struct...

Integrated electronic device comprising a coil and method for manuf...

Manufacturing process of a structured substrate

RF substrate with junctions having an improved layout

Method for making a transistor of which the active region includes...

Method for producing transistors implemented at low temperature

Architecture of N and P transistors superposed with canal structure...

Patents Applicationslast 30 patents

ARCHITECTURE WITH STACKED N AND P TRANSISTORS WITH A CHANNEL STRUCT...

RF SUBSTRATE WITH JUNCTIONS HAVING AN IMPROVED LAYOUT

MANUFACTURING PROCESS OF A STRUCTURED SUBSTRATE

INTEGRATED ELECTRONIC DEVICE COMPRISING A COIL AND METHOD FOR MANUF...

METHOD FOR PRODUCING TRANSISTORS IMPLEMENTED AT LOW TEMPERATURE

METHOD FOR MAKING A TRANSISTOR OF WHICH THE ACTIVE REGION INCLUDES...

ARCHITECTURE OF N AND P TRANSISTORS SUPERPOSED WITH CANAL STRUCTURE...