Jeffrey A. Metzger

Person

Leominster, MA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Bus interface slicing mechanism allowing for a control/data path slice
- Patent number 6,077,306
- Issue date Jun 20, 2000
- Compaq Computer Corporation
- Jeffrey A. Metzger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bus interface slicing mechanism allowing for a control/data-path slice
- Patent number 5,918,029
- Issue date Jun 29, 1999
- Digital Equipment Corporation
- Jeffrey A. Metzger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fault management scheme for a cache memory
- Patent number 5,629,950
- Issue date May 13, 1997
- Digital Equipment Corporation
- Nitin D. Godiwala
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Update vs. invalidate policy for a snoopy bus protocol
- Patent number 5,553,266
- Issue date Sep 3, 1996
- Digital Equipment Corporation
- Jeffrey A. Metzger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scheme for error handling in a computer system
- Patent number 5,361,267
- Issue date Nov 1, 1994
- Digital Equipment Corporation
- Nitin D. Godiwala
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Duplicate tag store for a processor having primary and backup cache...
- Patent number 5,319,766
- Issue date Jun 7, 1994
- Digital Equipment Corporation
- Kurt M. Thaller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interconnect arrangement for electronic components disposed on a ci...
- Patent number 5,297,107
- Issue date Mar 22, 1994
- Digital Equipment Corporation
- Jeffrey A. Metzger
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Self-compensating voltage level shifting circuit
- Patent number 5,287,517
- Issue date Feb 15, 1994
- Digital Equipment Corporation
- Barry A. Maskas
- H03 - BASIC ELECTRONIC CIRCUITRY

Jeffrey A. Metzger

Person

Patents Grantslast 30 patents

Bus interface slicing mechanism allowing for a control/data path slice

Bus interface slicing mechanism allowing for a control/data-path slice

Fault management scheme for a cache memory

Update vs. invalidate policy for a snoopy bus protocol

Scheme for error handling in a computer system

Duplicate tag store for a processor having primary and backup cache...

Interconnect arrangement for electronic components disposed on a ci...

Self-compensating voltage level shifting circuit