Jeffrey Alan Fredenburg

Person

Ann Arbor, MI, US

People

Patents Grantslast 30 patents

Information Patent Grant
Digital system synchronization
- Patent number 12,019,464
- Issue date Jun 25, 2024
- Movellus Circuits Inc.
- Jeffrey Alan Fredenburg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Frequency multiplier circuit with programmable frequency transition...
- Patent number 11,979,165
- Issue date May 7, 2024
- Movellus Circuits Inc.
- Scott Howe
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Frequency multiplier system with multi-transition controller
- Patent number 11,831,318
- Issue date Nov 28, 2023
- Movellus Circuits Inc.
- Scott Howe
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Frequency counter circuit for detecting timing violations
- Patent number 11,493,950
- Issue date Nov 8, 2022
- Movellus Circuits, Inc.
- Jeffrey Fredenburg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Frequency measurement circuit with adaptive accuracy
- Patent number 11,496,139
- Issue date Nov 8, 2022
- Movellus Circuits, Inc.
- Xiao Wu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Zero-offset phase detector apparatus and method
- Patent number 11,374,578
- Issue date Jun 28, 2022
- Movellus Circuits Inc.
- Chun-Ju Chou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Glitch-free digital controlled delay line apparatus and method
- Patent number 11,165,432
- Issue date Nov 2, 2021
- Movellus Circuits, Inc.
- Chun-Ju Chou
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Regulated charge sharing apparatus and methods
- Patent number 11,128,308
- Issue date Sep 21, 2021
- Movellus Circuits, Inc.
- Jeffrey Alan Fredenburg
- G05 - CONTROLLING REGULATING
Information Patent Grant
Locked loop circuit and method with digitally-controlled oscillator...
- Patent number 11,070,216
- Issue date Jul 20, 2021
- Movellus Circuits, Inc.
- Frederick Christopher Candler
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Locked loop circuit and method with digitally-controlled oscillator...
- Patent number 11,070,215
- Issue date Jul 20, 2021
- Movellus Circuits, Inc.
- Frederick Christopher Candler
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Timing analysis for parallel multi-state driver circuits
- Patent number 11,017,138
- Issue date May 25, 2021
- Movellus Circuits, Inc.
- Jeffrey Fredenburg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for calibrating a regulated charge sharing an...
- Patent number 10,972,115
- Issue date Apr 6, 2021
- Movellus Circuits, Inc.
- Jeffrey Alan Fredenburg
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Regulated charge sharing analog-to-digital converter (ADC) apparatu...
- Patent number 10,972,119
- Issue date Apr 6, 2021
- Movellus Circuits, Inc.
- Jeffrey Alan Fredenburg
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Phase and delay compensation circuit and method
- Patent number 10,972,106
- Issue date Apr 6, 2021
- Movellus Circuits, Inc.
- Chun-Ju Chou
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Integrated circuit design system with automatic timing margin reduc...
- Patent number 10,740,526
- Issue date Aug 11, 2020
- Movellus Circuits, Inc.
- Jeffrey Fredenburg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit design system with automatic timing margin reduc...
- Patent number 10,713,409
- Issue date Jul 14, 2020
- Movellus Circuits, Inc.
- Jeffrey Fredenburg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Timing analysis for electronic design automation of parallel multi-...
- Patent number 10,614,182
- Issue date Apr 7, 2020
- Movellus Circuits, Inc.
- Jeffrey Fredenburg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Locked loop circuit and method with digitally-controlled oscillator...
- Patent number 10,594,323
- Issue date Mar 17, 2020
- Movellus Circuits, Inc.
- Frederick Christopher Candler
- G04 - HOROLOGY
Information Patent Grant
Locked loop circuit with configurable second error input
- Patent number 10,587,275
- Issue date Mar 10, 2020
- Movellus Circuits, Inc.
- Jeffrey Fredenburg
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Digital, reconfigurable frequency and delay generator with phase me...
- Patent number 10,158,365
- Issue date Dec 18, 2018
- Movellus Circuits, Inc.
- Muhammad Faisal
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Concurrently optimized system-on-chip implementation with automatic...
- Patent number 10,031,992
- Issue date Jul 24, 2018
- Movellus Circuits, Inc.
- Jeffrey Fredenburg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reconfigurable phase-locked loop
- Patent number 9,762,249
- Issue date Sep 12, 2017
- Movellus Circuits, Inc.
- Muhammad Faisal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Reconfigurable phase-locked loop with optional LC oscillator capabi...
- Patent number 9,705,516
- Issue date Jul 11, 2017
- Movellus Circuits, Inc.
- Jeffrey Alan Fredenburg
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Digital controller for a phase-locked loop
- Patent number 9,698,798
- Issue date Jul 4, 2017
- Movellus Circuits, Inc.
- Jeffrey Alan Fredenburg
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Fractional and reconfigurable digital phase-locked loop
- Patent number 9,680,480
- Issue date Jun 13, 2017
- Movellus Circuits, Inc.
- Jeffrey Alan Fredenburg
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
TIMING MARGIN SENSOR
- Publication number 20240250673
- Publication date Jul 25, 2024
- Movellus Circuits Incorporated
- Marcus Van Ierssel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FREQUENCY MULTIPLIER CIRCUIT WITH PROGRAMMABLE FREQUENCY TRANSITION...
- Publication number 20240171184
- Publication date May 23, 2024
- Movellus Circuits Incorporated
- Scott Howe
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DIGITAL SYSTEM SYNCHRONIZATION
- Publication number 20220200604
- Publication date Jun 23, 2022
- Movellus Circuits Incorporated
- Jeffrey Alan Fredenburg
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ZERO-OFFSET PHASE DETECTOR APPARATUS AND METHOD
- Publication number 20220149848
- Publication date May 12, 2022
- Movellus Circuits Incorporated
- Chun-Ju Chou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REGULATED CHARGE SHARING APPARATUS AND METHODS
- Publication number 20210258015
- Publication date Aug 19, 2021
- Movellus Circuits Incorporated
- Jeffrey Alan Fredenburg
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
FREQUENCY COUNTER CIRCUIT FOR DETECTING TIMING VIOLATIONS
- Publication number 20210255661
- Publication date Aug 19, 2021
- Movellus Circuits Incorporated
- Jeffrey Fredenburg
- G01 - MEASURING TESTING
Information Patent Application
FREQUENCY MEASUREMENT CIRCUIT WITH ADAPTIVE ACCURACY
- Publication number 20210258013
- Publication date Aug 19, 2021
- Movellus Circuits Incorporated
- Xiao Wu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
LOCKED LOOP CIRCUIT AND METHOD WITH DIGITALLY-CONTROLLED OSCILLATOR...
- Publication number 20200304131
- Publication date Sep 24, 2020
- Movellus Circuits Incorporated
- Frederick Christopher Candler
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
TIMING ANALYSIS FOR PARALLEL MULTI-STATE DRIVER CIRCUITS
- Publication number 20200285794
- Publication date Sep 10, 2020
- Movellus Circuits Incorporated
- Jeffrey Fredenburg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOCKED LOOP CIRCUIT AND METHOD WITH DIGITALLY-CONTROLLED OSCILLATOR...
- Publication number 20200235746
- Publication date Jul 23, 2020
- Movellus Circuits Incorporated
- Frederick Christopher Candler
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
LOCKED LOOP CIRCUIT AND METHOD WITH DIGITALLY-CONTROLLED OSCILLATOR...
- Publication number 20190386663
- Publication date Dec 19, 2019
- Movellus Circuits Incorporated
- Frederick Christopher Candler
- G04 - HOROLOGY
Information Patent Application
INTEGRATED CIRCUIT DESIGN SYSTEM WITH AUTOMATIC TIMING MARGIN REDUC...
- Publication number 20190213297
- Publication date Jul 11, 2019
- Movellus Circuits Incorporated
- Jeffrey Fredenburg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOCKED LOOP CIRCUIT WITH CONFIGURABLE SECOND ERROR INPUT
- Publication number 20190190525
- Publication date Jun 20, 2019
- Movellus Circuits Incorporated
- Jeffrey Fredenburg
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
CONCURRENTLY OPTIMIZED SYSTEM-ON-CHIP IMPLEMENTATION WITH AUTOMATIC...
- Publication number 20190087516
- Publication date Mar 21, 2019
- Movellus Circuits Incorporated
- Jeffrey Fredenburg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUIT DESIGN SYSTEM WITH AUTOMATIC TIMING MARGIN REDUC...
- Publication number 20190050517
- Publication date Feb 14, 2019
- Movellus Circuits Incorporated
- Jeffrey Fredenburg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONCURRENTLY OPTIMIZED SYSTEM-ON-CHIP IMPLEMENTATION WITH AUTOMATIC...
- Publication number 20180181684
- Publication date Jun 28, 2018
- Movellus Circuits Incorporated
- Jeffrey Fredenburg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TIMING ANALYSIS FOR ELECTRONIC DESIGN AUTOMATION OF PARALLEL MULTI-...
- Publication number 20180107774
- Publication date Apr 19, 2018
- Movellus Circuits Incorporated
- Jeffrey Fredenburg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Digital, Reconfigurable Frequency and Delay Generator with Phase Me...
- Publication number 20180034468
- Publication date Feb 1, 2018
- Movellus Circuits, Inc.
- Muhammad Faisal
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Jeffrey Alan Fredenburg

Person

Patents Grantslast 30 patents

Digital system synchronization

Frequency multiplier circuit with programmable frequency transition...

Frequency multiplier system with multi-transition controller

Frequency counter circuit for detecting timing violations

Frequency measurement circuit with adaptive accuracy

Zero-offset phase detector apparatus and method

Glitch-free digital controlled delay line apparatus and method

Regulated charge sharing apparatus and methods

Locked loop circuit and method with digitally-controlled oscillator...

Locked loop circuit and method with digitally-controlled oscillator...

Timing analysis for parallel multi-state driver circuits

Methods and apparatus for calibrating a regulated charge sharing an...

Regulated charge sharing analog-to-digital converter (ADC) apparatu...

Phase and delay compensation circuit and method

Integrated circuit design system with automatic timing margin reduc...

Integrated circuit design system with automatic timing margin reduc...

Timing analysis for electronic design automation of parallel multi-...

Locked loop circuit and method with digitally-controlled oscillator...

Locked loop circuit with configurable second error input

Digital, reconfigurable frequency and delay generator with phase me...

Concurrently optimized system-on-chip implementation with automatic...

Reconfigurable phase-locked loop

Reconfigurable phase-locked loop with optional LC oscillator capabi...

Digital controller for a phase-locked loop

Fractional and reconfigurable digital phase-locked loop

Patents Applicationslast 30 patents

TIMING MARGIN SENSOR

FREQUENCY MULTIPLIER CIRCUIT WITH PROGRAMMABLE FREQUENCY TRANSITION...

DIGITAL SYSTEM SYNCHRONIZATION

ZERO-OFFSET PHASE DETECTOR APPARATUS AND METHOD

REGULATED CHARGE SHARING APPARATUS AND METHODS

FREQUENCY COUNTER CIRCUIT FOR DETECTING TIMING VIOLATIONS

FREQUENCY MEASUREMENT CIRCUIT WITH ADAPTIVE ACCURACY

LOCKED LOOP CIRCUIT AND METHOD WITH DIGITALLY-CONTROLLED OSCILLATOR...

TIMING ANALYSIS FOR PARALLEL MULTI-STATE DRIVER CIRCUITS

LOCKED LOOP CIRCUIT AND METHOD WITH DIGITALLY-CONTROLLED OSCILLATOR...

LOCKED LOOP CIRCUIT AND METHOD WITH DIGITALLY-CONTROLLED OSCILLATOR...

INTEGRATED CIRCUIT DESIGN SYSTEM WITH AUTOMATIC TIMING MARGIN REDUC...

LOCKED LOOP CIRCUIT WITH CONFIGURABLE SECOND ERROR INPUT

CONCURRENTLY OPTIMIZED SYSTEM-ON-CHIP IMPLEMENTATION WITH AUTOMATIC...

INTEGRATED CIRCUIT DESIGN SYSTEM WITH AUTOMATIC TIMING MARGIN REDUC...

CONCURRENTLY OPTIMIZED SYSTEM-ON-CHIP IMPLEMENTATION WITH AUTOMATIC...

TIMING ANALYSIS FOR ELECTRONIC DESIGN AUTOMATION OF PARALLEL MULTI-...

Digital, Reconfigurable Frequency and Delay Generator with Phase Me...