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Jeffrey C. Swanson
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Sunnyvale, CA, US
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Patents Grants
last 30 patents
Information
Patent Grant
High performance interconnect
Patent number
11,741,030
Issue date
Aug 29, 2023
Intel Corporation
Robert J. Safranek
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
High performance interconnect
Patent number
11,269,793
Issue date
Mar 8, 2022
Intel Corporation
Robert J. Safranek
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Control messaging in multislot link layer flit
Patent number
10,380,059
Issue date
Aug 13, 2019
Intel Corporation
Jeff Willey
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
High performance interconnect link layer
Patent number
10,365,965
Issue date
Jul 30, 2019
Intel Corporation
Jeff Willey
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
High performance interconnect link layer
Patent number
10,360,098
Issue date
Jul 23, 2019
Intel Corporation
Jeff Willey
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
High performance interconnect
Patent number
10,248,591
Issue date
Apr 2, 2019
Intel Corporation
Robert J. Safranek
H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information
Patent Grant
Multislot link layer flit wherein flit includes three or more slots...
Patent number
10,204,064
Issue date
Feb 12, 2019
Intel Corporation
Jeff Willey
H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information
Patent Grant
Early identification in transactional buffered memory
Patent number
10,198,379
Issue date
Feb 5, 2019
Intel Corporation
Brian S. Morris
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
High performance interconnect physical layer
Patent number
10,146,733
Issue date
Dec 4, 2018
Intel Corporation
Venkatraman Iyer
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Control messaging in multislot link layer flit
Patent number
10,140,240
Issue date
Nov 27, 2018
Intel Corporation
Jeff Willey
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Packed write completions
Patent number
10,061,719
Issue date
Aug 28, 2018
Intel Corporation
Brian S. Morris
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Multislot link layer flit wherein flit includes three or more slots...
Patent number
9,753,885
Issue date
Sep 5, 2017
Intel Corporation
Jeff Willey
H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information
Patent Grant
Early identification in transactional buffered memory
Patent number
9,740,646
Issue date
Aug 22, 2017
Intel Corporation
Brian S. Morris
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Control messaging in multislot link layer flit
Patent number
9,740,654
Issue date
Aug 22, 2017
Intel Corporation
Jeff Willey
H03 - BASIC ELECTRONIC CIRCUITRY
Information
Patent Grant
High performance interconnect
Patent number
9,626,321
Issue date
Apr 18, 2017
Intel Corporation
Robert J. Safranek
H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information
Patent Grant
Method, apparatus, and system for enabling platform power states
Patent number
9,537,665
Issue date
Jan 3, 2017
Intel Corporation
Selim Bilgin
H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information
Patent Grant
Control messaging in multislot link layer flit
Patent number
9,507,746
Issue date
Nov 29, 2016
Intel Corporation
Jeff Willey
H03 - BASIC ELECTRONIC CIRCUITRY
Information
Patent Grant
High performance interconnect link layer
Patent number
9,479,196
Issue date
Oct 25, 2016
Intel Corporation
Jeff Willey
H03 - BASIC ELECTRONIC CIRCUITRY
Information
Patent Grant
High performance interconnect link layer
Patent number
9,444,492
Issue date
Sep 13, 2016
Intel Corporation
Jeff Willey
H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information
Patent Grant
High performance interconnect physical layer
Patent number
9,355,058
Issue date
May 31, 2016
Intel Corporation
Venkatraman Iyer
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
High performance interconnect physical layer
Patent number
9,208,121
Issue date
Dec 8, 2015
Intel Corporation
Venkatraman Iyer
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Method, apparatus, and system for enabling platform power states
Patent number
8,539,260
Issue date
Sep 17, 2013
Intel Corporation
Selim Bilgin
H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information
Patent Grant
Performance adder for tracking occurrence of events within a circuit
Patent number
7,480,590
Issue date
Jan 20, 2009
Hewlett-Packard Development Company, L.P.
Jeffrey C. Swanson
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
System and method for multiple cycle capture of chip state
Patent number
7,325,164
Issue date
Jan 29, 2008
Hewlett-Packard Development Company, L.P.
Jeffrey C. Swanson
G01 - MEASURING TESTING
Information
Patent Grant
Method and apparatus for storing multiple entry types and ordering...
Patent number
7,117,297
Issue date
Oct 3, 2006
Hewlett-Packard Development Company, L.P.
Jeffrey Charles Swanson
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Performance adder for tracking occurrence of events within a circuit
Patent number
6,775,640
Issue date
Aug 10, 2004
Hewlett-Packard Development Company, L.P.
Jeffrey C. Swanson
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
System and method for multiple cycle capture of chip state
Patent number
6,662,313
Issue date
Dec 9, 2003
Hewlett-Packard Development Company, L.P.
Jeffrey C. Swanson
G01 - MEASURING TESTING
Information
Patent Grant
Reconfigurable FIFO interface to support multiple channels in bundl...
Patent number
6,594,714
Issue date
Jul 15, 2003
Hewlett-Packard Development Company, L.P.
Jeffrey C. Swanson
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Apparatus and method for tracking flushes of cache entries in a dat...
Patent number
6,591,332
Issue date
Jul 8, 2003
Hewlett-Packard Development Company, L.P.
Jeffrey C. Swanson
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
System and method for single point observability of a dual-mode con...
Patent number
6,587,965
Issue date
Jul 1, 2003
Hewlett-Packard Development Company, L.P.
Ian P. Shaeffer
G06 - COMPUTING CALCULATING COUNTING
Patents Applications
last 30 patents
Information
Patent Application
HIGH PERFORMANCE INTERCONNECT
Publication number
20240012772
Publication date
Jan 11, 2024
Intel Corporation
Robert J. Safranek
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
MEMORY TRANSACTION QUEUE BYPASS BASED ON CONFIGURABLE ADDRESS AND B...
Publication number
20220179797
Publication date
Jun 9, 2022
Intel Corporation
Jeffrey C. Swanson
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
HIGH PERFORMANCE INTERCONNECT
Publication number
20220114122
Publication date
Apr 14, 2022
Intel Corporation
Robert J. Safranek
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
HIGH PERFORMANCE INTERCONNECT
Publication number
20210117350
Publication date
Apr 22, 2021
Intel Corporation
Robert J. Safranek
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
HIGH PERFORMANCE INTERCONNECT
Publication number
20200356502
Publication date
Nov 12, 2020
Intel Corporation
Robert J. Safranek
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
HIGH PERFORMANCE INTERCONNECT
Publication number
20190391939
Publication date
Dec 26, 2019
Intel Corporation
Robert J. Safranek
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
CONTROL MESSAGING IN MULTISLOT LINK LAYER FLIT
Publication number
20180196774
Publication date
Jul 12, 2018
INTEL CORPORATION
Jeff Willey
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
MULTISLOT LINK LAYER FLIT WHEREIN FLIT INCLUDES THREE OR MORE SLOTS...
Publication number
20180143937
Publication date
May 24, 2018
Intel Corporation
Jeff Willey
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
EARLY IDENTIFICATION IN TRANSACTIONAL BUFFERED MEMORY
Publication number
20180060259
Publication date
Mar 1, 2018
Intel Corporation
Brian S. Morris
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
HIGH PERFORMANCE INTERCONNECT LINK LAYER
Publication number
20180011759
Publication date
Jan 11, 2018
Intel Corporation
Jeff Willey
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
CONTROL MESSAGING IN MULTISLOT LINK LAYER FLIT
Publication number
20170308497
Publication date
Oct 26, 2017
INTEL CORPORATION
Jeff Willey
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
HIGH PERFORMANCE INTERCONNECT LINK LAYER
Publication number
20170123894
Publication date
May 4, 2017
Intel Corporation
Jeff Willey
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
HIGH PERFORMANCE INTERCONNECT
Publication number
20170109315
Publication date
Apr 20, 2017
Intel Corporation
Robert J. Safranek
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
HIGH PERFORMANCE INTERCONNECT PHYSICAL LAYER
Publication number
20160378711
Publication date
Dec 29, 2016
Intel Corporation
Venkatraman Iyer
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
PACKED WRITE COMPLETIONS
Publication number
20160188500
Publication date
Jun 30, 2016
Intel Corporation
Brian S. Morris
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
EARLY IDENTIFICATION IN TRANSACTIONAL BUFFERED MEMORY
Publication number
20160179718
Publication date
Jun 23, 2016
Intel Corporation
Brian S. Morris
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
MULTISLOT LINK LAYER FLIT
Publication number
20150261711
Publication date
Sep 17, 2015
Jeff Willey
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
CONTROL MESSAGING IN MULTISLOT LINK LAYER FLIT
Publication number
20150186327
Publication date
Jul 2, 2015
Intel Corporation
Jeff Willey
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
HIGH PERFORMANCE INTERCONNECT LINK LAYER
Publication number
20150180507
Publication date
Jun 25, 2015
Intel Corporation
Jeff Willey
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
HIGH PERFORMANCE INTERCONNECT PHYSICAL LAYER
Publication number
20150067208
Publication date
Mar 5, 2015
Intel Corporation
Venkatraman Iyer
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
HIGH PERFORMANCE INTERCONNECT PHYSICAL LAYER
Publication number
20140115207
Publication date
Apr 24, 2014
Venkatraman Iyer
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
HIGH PERFORMANCE INTERCONNECT LINK LAYER
Publication number
20140115420
Publication date
Apr 24, 2014
Jeff Willey
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
HIGH PERFORMANCE INTERCONNECT
Publication number
20140112339
Publication date
Apr 24, 2014
Robert J. Safranek
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
CONTROL MESSAGING IN MULTISLOT LINK LAYER FLIT
Publication number
20140115208
Publication date
Apr 24, 2014
Jeff Willey
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
METHOD, APPARATUS, AND SYSTEM FOR ENABLING PLATFORM POWER STATES
Publication number
20130336336
Publication date
Dec 19, 2013
Selim Bilgin
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
Method, apparatus, and system for enabling platform power states
Publication number
20110246798
Publication date
Oct 6, 2011
Selim Bilgin
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
Method and apparatus for storing multiple entry types and ordering...
Publication number
20040236900
Publication date
Nov 25, 2004
Jeffrey Charles Swanson
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
Performance adder for tracking occurrence of events within a circuit
Publication number
20040223520
Publication date
Nov 11, 2004
Jeffrey C. Swanson
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
System and method for multiple cycle capture of chip state
Publication number
20040153838
Publication date
Aug 5, 2004
Jeffrey C. Swanson
G01 - MEASURING TESTING