Jeffrey E. Trull

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method for selecting transistor threshold voltages in an integrated...
- Patent number 7,188,325
- Issue date Mar 6, 2007
- Advanced Micro Devices, Inc.
- Marius Evers
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for denormal load handling
- Patent number 6,487,653
- Issue date Nov 26, 2002
- Advanced Micro Devices, Inc.
- Stuart F. Oberman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Detecting full conditions in a queue
- Patent number 6,460,130
- Issue date Oct 1, 2002
- Advanced Micro Devices, Inc.
- Jeffrey E. Trull
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Rapid execution of floating point load control word instructions
- Patent number 6,405,305
- Issue date Jun 11, 2002
- Advanced Micro Devices, Inc.
- Stephan G. Meier
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Rapid selection of oldest eligible entry in a queue
- Patent number 6,247,114
- Issue date Jun 12, 2001
- Advanced Micro Devices, Inc.
- Jeffrey E. Trull
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for instruction queue compression
- Patent number 6,185,672
- Issue date Feb 6, 2001
- Advanced Micro Devices, Inc.
- Jeffrey E. Trull
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scan chains for out-of-order load/store execution control
- Patent number 6,038,657
- Issue date Mar 14, 2000
- Advanced Micro Devices, Inc.
- John G. Favor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processing system that rapidly indentifies first or second operatio...
- Patent number 5,881,261
- Issue date Mar 9, 1999
- Advanced Micro Devices, Inc.
- John G. Favor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hierarchical scan logic for out-of-order load/store execution control
- Patent number 5,835,747
- Issue date Nov 10, 1998
- Advanced Micro Devices, Inc.
- Jeffrey E. Trull
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Out-of-order load/store execution control
- Patent number 5,754,812
- Issue date May 19, 1998
- Advanced Micro Devices, Inc.
- John G. Favor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scan chain for rapidly identifying first or second objects of selec...
- Patent number 5,745,724
- Issue date Apr 28, 1998
- Advanced Micro Devices, Inc.
- John G. Favor
- G06 - COMPUTING CALCULATING COUNTING

Jeffrey E. Trull

Person

Patents Grantslast 30 patents

Method for selecting transistor threshold voltages in an integrated...

Method and apparatus for denormal load handling

Detecting full conditions in a queue

Rapid execution of floating point load control word instructions

Rapid selection of oldest eligible entry in a queue

Method and apparatus for instruction queue compression

Scan chains for out-of-order load/store execution control

Processing system that rapidly indentifies first or second operatio...

Hierarchical scan logic for out-of-order load/store execution control

Out-of-order load/store execution control

Scan chain for rapidly identifying first or second objects of selec...