Jeffrey Fox

Person

Los Gatos, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Parameterizable method for simulating PLL behavior
- Patent number 9,628,095
- Issue date Apr 18, 2017
- Altera Corporation
- Nikolaos Liveris
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Methods and tools for designing integrated circuits with auto-pipel...
- Patent number 9,251,300
- Issue date Feb 2, 2016
- Altera Corporation
- Michael D. Hutton
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Debuggable opaque IP
- Patent number 9,064,068
- Issue date Jun 23, 2015
- Altera Corporation
- Jeffrey R. Fox
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for controlling evaluation of protected intell...
- Patent number 7,681,233
- Issue date Mar 16, 2010
- Altera Corporation
- Jeffrey R. Fox
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System level simulation models for hardware modules
- Patent number 7,509,246
- Issue date Mar 24, 2009
- Altera Corporation
- Philippe Molson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Debuggable opaque IP
- Patent number 7,409,652
- Issue date Aug 5, 2008
- Altera Corporation
- Jeffrey R. Fox
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for controlling evaluation of protected intell...
- Patent number 7,234,159
- Issue date Jun 19, 2007
- Altera Corporation
- Jeffrey R. Fox
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
PCI bus switch architecture
- Patent number 6,715,023
- Issue date Mar 30, 2004
- Altera Corporation
- Ziad M. Abu-Lebdeh
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
METHODS AND TOOLS FOR DESIGNING INTEGRATED CIRCUITS WITH AUTO-PIPEL...
- Publication number 20150121319
- Publication date Apr 30, 2015
- Altera Corporation
- Michael D. Hutton
- G06 - COMPUTING CALCULATING COUNTING

Jeffrey Fox

Person

Patents Grantslast 30 patents

Parameterizable method for simulating PLL behavior

Methods and tools for designing integrated circuits with auto-pipel...

Debuggable opaque IP

Method and apparatus for controlling evaluation of protected intell...

System level simulation models for hardware modules

Debuggable opaque IP

Method and apparatus for controlling evaluation of protected intell...

PCI bus switch architecture

Patents Applicationslast 30 patents

METHODS AND TOOLS FOR DESIGNING INTEGRATED CIRCUITS WITH AUTO-PIPEL...